基于PIC单片机的脉冲电源:设计了一种金属凝固过程用脉冲电源。该电源采用PIC16F877作为主控芯片，实现对窄脉冲电流幅值的检测，以及时电流脉冲幅值根据模糊PID算法进行闲环控制。使用结果表明：该电源的输出脉冲波形良好，电流幅值稳定，满足合金材料凝固过程的工艺要求且运行稳定可靠。关键词：脉冲电源；PIC16F877单片机；模糊PID；闲环控制 Abstract：A kind of pulse power supply was designed which uses in the metal solidification process ．．I11is power supply used PIC16F877 to take the master control chip reali on to the narrow pulse electric current peak-to-peak value examination，carried on the closed-loop control to the electric current pulse peak-to-peak value basis fuzzy PID algorithm．The use result indicated ，this power supply output se profile is good，and the electric current peak-to-p~k value is stable，It satisfies the alloy material solidification process the technological requirement and movement stable reliable，Key words：p se po wer supply；PIC16F877single-chip microcontroller；f r PID；closed-loop control
上传时间： 2013-10-27
上传用户：xcy122677
本文依据集成电路设计方法学，探讨了一种基于标准Intel 8086 微处理器的单芯片计算机平台的架构。研究了其与SDRAM，8255 并行接口等外围IP 的集成，并在对AMBA协议和8086 CPU分析的基础上，采用遵从AMBA传输协议的系统总线代替传统的8086 CPU三总线结构，搭建了基于8086 IP 软核的单芯片计算机系统，并实现了FPGA 功能演示。关键词：微处理器； SoC；单芯片计算机；AMBA 协议 Design of 8086 CPU Based Computer-on-a-chip System（School of Electrical Engineering and Automation, Heifei University of Technology, Hefei, 230009,China）Abstract: According to the IC design methodology, this paper discusses the design of one kind of Computer-on-a-chip system architecture, which is based on the standard Intel8086 microprocessor,investigates how to integrate the 8086 CPU and peripheral IP such as, SDRAM controller, 8255 PPI etc. Based on the analysis of the standard Intel8086 microprocessor and AMBA Specification,the Computer-on-a-chip system based on 8086 CPU which uses AMBA bus instead of traditional three-bus structure of 8086 CPU is constructed, and the FPGA hardware emulation is fulfilled.Key words: Microprocessor; SoC; Computer-on-a-chip; AMBA Specification
上传时间： 2013-12-27
上传用户：kernor
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
上传时间： 2014-01-24
上传用户：zl5712176
设计一种应用于某全地形ATV车载武器装置中的中控系统，该系统设计是以TMS320F2812型DSP为核心，采用模块化设计思想，对其硬件部分进行系统设计，能够完成对武器装置高低、回转方向的运动控制，实现静止或行进状态中对目标物的测距，自动瞄准以及按既定发射模式发射弹丸和各项安全性能检测等功能。通过编制相应的软件，对其进行系统调试，验证了该设计运行稳定。 Abstract: A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core， uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment， rotation direction， to achieve a state of static or moving objects on the target ranging， auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.
上传时间： 2013-11-02
上传用户：jshailingzzh
Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express configuration are described in detail, followed by detailed instructions thatshow how to implement the configuration circui
标签： Spartan-XL Express XAPP FPGA
上传时间： 2014-12-28
上传用户：hewenzhi
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum clocks using the DCM_CLKGEN primitive.
上传时间： 2014-12-28
上传用户：yan2267246
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上传时间： 2013-10-15
上传用户：euroford
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-14
上传用户：fdmpy
为提升虚拟仪器传输速率与实时性能，扩展监测范围，在VC的软件平台上设计了一种全功能虚拟示波器。与传统虚拟示波器相比，该系统采用嵌入式系统完成信号采集，采用工业以太网为传输介质，通过线性插值算法和多线程编程思想，实现波形显示、参数计算、频谱分析以及波形存储及回放功能。实验结果表明，该虚拟示波器可以实现20 kHz采样频率下的波形精确显示，达到预期的各项指标。 Abstract: o enhance the transfer rate and real-time of virtual instrument performance， expand scope of monitoring， this paper uses the VCs software platform to design a fully functional virtual oscilloscope. Compared with traditional virtual oscilloscope， this system adopts the embedded system to complete the data acquisition， industrial Ethernet as the transmission medium used by the linear interpolation algorithm and multi-threaded programming ideas， namely to achieve waveform display， parameter calculation， spectrum analysis and waveform storage and playback. Experimental results show that the virtual oscilloscope can accurately display the waveform with 20kHz sampling frequency， and achieve the desired targets.
上传时间： 2013-11-25
上传用户：wbwyl
Abstract: The number of uses for microelectromechanical systems (MEMS) is growing—they allow us todo jobs once considered impossible. This tutorial explains the applications for MEMS and the increasingneed to provide precision control and drivers for these devices. Design and manufacturing considerationsare also discussed.
上传时间： 2013-11-12
上传用户：paladin
