Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting devices and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.
上传时间： 2013-11-18
上传用户：zhouxuepeng1
引言 在数字信息传输中，基带数字信号通常要经过调制器调制，将频率搬移到适合信息传输的频段上。2FSK就是用数字信号去调制载波的频率（移频键控），由于它具有方法简单、易于实现、抗噪声和抗衰落性能较强等优点，因此在现代数字通信系统的低、中速数据传输中得到了广泛应用。 直接数字频率合成技术(DDS)将先进的数字处理技术与方法引入信号合成领域。DDS器件采用高速数字电路和高速D/A转换技术，具备频率转换时间短、频率分辨率高、频率稳定度高、输出信号频率和相位可快速程控切换等优点，可以实现对信号的全数字式调制。
上传时间： 2014-12-27
上传用户：1427796291
The government of a small but important country has decided that the alphabet needs to be streamlined and reordered. Uppercase letters will be eliminated. They will issue a royal decree in the form of a String of B and A characters. The first character in the decree specifies whether a must come ( B )Before b in the new alphabet or ( A )After b . The second character determines the relative placement of b and c , etc. So, for example, "BAA" means that a must come Before b , b must come After c , and c must come After d . Any letters beyond these requirements are to be excluded, so if the decree specifies k comparisons then the new alphabet will contain the first k+1 lowercase letters of the current alphabet. Create a class Alphabet that contains the method choices that takes the decree as input and returns the number of possible new alphabets that conform to the decree. If more than 1,000,000,000 are possible, return -1. Definition
标签： government streamline important alphabet
上传时间： 2015-06-09
上传用户：weixiao99
加密算法 Test Driver for Crypto++, a C++ Class Library of Cryptographic Primitives: - To generate an RSA key cryptest g - To encrypt and decrypt a string using RSA cryptest r - To calculate MD5, SHS, and RIPEMD-160 message digests: cryptest m file - To encrypt and decrypt a string using DES-EDE in CBC mode: cryptest t - To encrypt or decrypt a file cryptest e|d input output - To share a file into shadows: cryptest s <pieces> <pieces-needed> file (make sure file has no extension, if you re running this under DOS) - To reconstruct a file from shadows: cryptest j output file1 file2 [....] - To gzip a file: cryptest z <compression-level> input output - To gunzip a file: cryptest u input output - To run validation tests: cryptest v - To run benchmarks: cryptest b [time for each benchmark in seconds]
标签： Cryptographic Primitives generate Library
上传时间： 2015-07-16
上传用户：wqxstar
This submission includes the presentation and model files that were used in delivering a webinar on 12-15-05 that covered the topic of modeling Hybrid Electric Vehicles. Hybrid electric vehicles (HEVs) have proven they can substantially improve fuel economy and reduce emissions. Because HEVs combine an electric drive with the internal combustion engine (ICE) in the powertrain, the vehicle?s kinetic energy can be captured during braking and transformed into electrical energy in the battery. The dual power source also means that the ICE can be reduced in size and can operate at its most efficient speeds.
标签： presentation submission delivering includes
上传时间： 2015-12-24
上传用户：zl5712176
We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to compare two items. Your task is to make a number of comparisons, and then output the sorted order. The cost of determining if a < b is given by the bth integer of element a of costs (space delimited), which is the same as the ath integer of element b. Naturally, you will be judged on the total cost of the comparisons you make before outputting the sorted order. If your order is incorrect, you will receive a 0. Otherwise, your score will be opt/cost, where opt is the best cost anyone has achieved and cost is the total cost of the comparisons you make (so your score for a test case will be between 0 and 1). Your score for the problem will simply be the sum of your scores for the individual test cases.
标签： represented integers group items
上传时间： 2016-01-17
上传用户：jeffery
FreeTTS is a speech synthesis system written entirely in the Java programming language. It is based upon Flite, a small, fast, run-time speech synthesis engine, which in turn is based upon University of Edinburgh s Festival Speech Synthesis System and Carnegie Mellon University s FestVox project.
标签： programming synthesis entirely language
上传时间： 2014-08-29
上传用户：cylnpy
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上传时间： 2013-12-13
上传用户：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上传时间： 2014-01-20
上传用户：三人用菜
I was trying to develope a programme to make a slide show of all the pictures of a folder using vb.net. I have spent lot of time in net for searching this but all in vain, I didn t get a simple programme to solve the same and lastly I gave myself a try for the same and developed the code, I have used there a folderbrowserdialogue and a timer with a picture box control and in coding I have used IO name spaces to get the pathe and folder info here is the code. Enjoy Subhankar
标签： programme develope pictures trying
上传时间： 2017-04-24
上传用户：a3318966
