Pong is a mixed schematic, VHDL, Verilog project featuring the PS2 and VGA monitor connections of the Xilinx\Digilent Spartan-3 demo board.
标签: connections featuring schematic Verilog
上传时间: 2014-01-15
上传用户:362279997
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx庐 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis applications.
标签: applications development hardware paper
上传时间: 2013-12-21
上传用户:jichenxi0730
本人根据opencores.org上的cordic算法改写的可配置位宽的cordic算法,并且在原始的级联型的基础上编写的循环(iterative)型的cordic,可通过generic配置。带一个不可综合和可综合的testbench(for altera)。稍微改动可应用于xilinx fpga
上传时间: 2017-04-10
上传用户:ljt101007
xiinx的edk开发的文档,看了这个文档,你可以找到所有xilinx EDK开发的相关文档。
上传时间: 2013-12-31
上传用户:钓鳌牧马
FPGA 并行NOR FLash的操作相关,很实用的,基于Xilinx SPartan-3
上传时间: 2013-12-13
上传用户:GavinNeko
调用FPGA的IP核实现FFT运算,在xilinx的vertex4sx55FPGA的实现
上传时间: 2013-12-24
上传用户:teddysha
文章介绍了系统的硬件电路原理与具体实现方法,其中主要包括载波恢 复电路,PN 码捕获电路和跟踪电路,并针对Xilinx 公司FPGA 的特点,对各电 路的实现进行优化设计,在不影响系统稳定性和精度的前提下,减少硬件资源 消耗,提高硬件利用率。设计利用Verilog 硬件描述语言完成,通过后仿真验证 电路正确性,并给出综合结果。
上传时间: 2013-12-09
上传用户:zq70996813
经典的FIFO实现源码,里面有三种类型,是xilinx工程师写的,经典
上传时间: 2017-05-23
上传用户:561596
Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.
标签: design hardware includes Encoder
上传时间: 2013-12-15
上传用户:王者A
是ISE的中文教程,主要是对初学者演示和展示在XILINX的ISE集成软件环境下,如何用VHDL和原理图的方式进行设计输入,用MOdelsim方针。
上传时间: 2017-06-10
上传用户:gxf2016