FIR Filter Design This chapter treats the design of linear-phase FIR filters. The assignments are divided in two parts, the first part focuses on the design of FIR filters using the window design method while the second part focuses on design
标签： linear-phase assignments FIR chapter
上传时间： 2017-03-20
上传用户：yoleeson
Decimal counter which is counting from 256 to 0. After that there will appear logic "1" in out. You can stop counting by pressing sequence. I called it detonation clock :]
标签： counting Decimal counter appear
上传时间： 2014-10-13
上传用户：731140412
The purpose of this project is to explore the issues and implementation of a multiple instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second level cache, and maintain coherence at the L1 cache with a write-invalidate policy. The L2 cache is two-way set associative, with a block size of 8 words, and a total capacity of 512 words.
标签： implementation instruction multiple purpose
上传时间： 2017-04-18
上传用户：731140412
TLC548和TLC549是以8位开关电容逐次逼近A/D转换器为基础而构造的CMOS A/D转换器。它们设 计成能通过3态数据输出和模拟输入与微处理器或外围设备串行接口。TLC548和TLC549仅用输入/输出时 钟（I/O CLOCK） 和芯片选择（CS） 输入作数据控制。TLC548的最高I/O CLOCK输入频率为2.048MHz， 而TLC549的I/O CLOCK输入频率最高可达1.1MHz。 有关与大多数通用微处理器接口的详细资料已由工厂 准备好，可供使用。
上传时间： 2013-11-28
上传用户：aig85
This is an interface program for flip flop emulation. At first pulse at the input pin the apropriate output will latch and at the second pulse will release. Very short and efficient program
标签： apropriate interface emulation the
上传时间： 2017-04-19
上传用户：a3318966
This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
标签： Compressor Hardware Baseline features
上传时间： 2017-04-21
上传用户：wyc199288
This example sets up the PLL in x10/2 mode, divides SYSCLKOUT by six to reach a 25Mhz HSPCLK (assuming a 30Mhz XCLKIN). The clock divider in the ADC is not used so that the ADC will see the 25Mhz on the HSPCLK. Interrupts are enabled and the EVA is setup to generate a periodic ADC SOC on SEQ1. Two channels are converted, ADCINA3 and ADCINA2.
标签： SYSCLKOUT example divides HSPCLK
上传时间： 2014-01-25
上传用户：ljt101007
This project developed in java leads us to realize a flight reservation system in order to emulate databases containing the structures for the flight and for the booking. These bases extend the List interface and implements additional search鈥檚 methods. Two interfaces provide an access to this system. The first one reads and handles reservation request message from a terminal. The arguments are then processed throw a middleware interface that call the flight system methods. The second one, a Graphical User Interfaces (GUI) application using Swing Java Foundation Classes (JFC), offers a simpler access to the systems.
标签： reservation developed project emulate
上传时间： 2017-04-27
上传用户：6546544
java3D game engine design of the source [three-dimensionalvirtualrealitynetworkprogram] - "virtual reality 3D network programming language VRML -- second-generation network programming language" CD Distribution
标签： three-dimensionalvirtualrealityne tworkprogram virtual java3D
上传时间： 2013-12-10
上传用户：498732662
世界上唯一一本关于嵌入式操作系统thradX内核的书，中文有翻译的第一版，这是从老外网上辛苦找来的2009年的新版第二版，大家共同学习。《Real-Time_Embedded_Multithreading_Using_ThreadX(Second Edition)》
上传时间： 2017-05-04
上传用户：851197153
