提出一种融合Ad hoc网络、GPRS/GSM和PSTN的远程分布式环境状况实时监测系统设计方案。由IEEE 802.15.4标准组建的Ad hoc无线传感器网络负责监测环境温湿度、光照度、煤气及CO浓度等；采用GPRS/GSM模块和嵌入式Modem构造无线网关，实现Ad hoc网络与GPRS/GSM和PSTN的无缝连接，将无线传感器网络采集的数据发送到手机或远端计算机。系统具有小、远和散的特点，可实现多点分布、中央管理、多层报警和远程监测。
上传时间： 2013-11-08
上传用户：semi1981
致力于提供高速信号处理解决方案的北京拓目科技有限公司（Beijing Topmoo Tech Co. Ltd）在2011年推出基于FLASH阵列存储的高端固态存储产品TMS-F231-160G之后，近日宣布推出其入门级固态存储产品TMS-S231-512G。 在容量选择上，TMS-F231-160G可以通过更换PIN2PIN的FLASH芯片而达到扩容目的,但是SLC FLASH成本高居不下，在目前高速发展的工业相机领域，难以推广普及。为了推动高速工业相机存储市场的发展，拓目科技发布了基于SATA接口的SSD盘存储系统TMS-S231-512G，随着消费电子的发展，SSD的单盘容量不断的扩大，价格不断的降低，必然能使TMS-S231-512G得到广泛的应用。 “TMS-S231-512G是一款专门针对航空拍摄、工业照相、汽车碰撞实验等需要高速图像采集、存储的场合而开发的固态存储设备”拓目科技产品经理Lemon Chan介绍道，“该产品的单盘存储容量最高可达512GB，单盘存储带宽则最高可达250MB/s，在该带宽支持条件下，TMS-S231-512G最高能支持1280x1024@200fps的连续拍照模式，几乎适用于所有需要高速图像采集的场合”。 “目前，Camera Link接口在航空相机、工业相机等领域得到广泛应用。与此同时，TMS-S231-512G板载两个SFP光纤接口，最高可支持5Gbps的有效数据吞吐率。”拓目科技研发总监Steven Wu介绍道，“除了硬件板卡以外，拓目科技还提供一整套完整的客户端解决方案，以方便客户能够轻易地对设备进行管控，同时方便客户对记录下来的数据进行预览、下载等操作”。 “与国外同类产品相比，TMS-S231-512G除了大容量、高带宽等优点以外，另一大优势在于其极强的可定制性。TMS-S231-512G从硬件设计到软件开发，所有的核心技术都由拓目科技研发团队自主开发，相比于国外同类产品，拓目科技无论在产品的可定制性还是售后技术支持方面，都具有较大的优势”Steven Wu补充道。 同时，该款产品所有器件均采用工业级宽温芯片，温度、振动等环境适应性试验均已顺利通过，能最大程度地保证产品在恶劣环境下的可靠性。 TMS-S231系列产品特点 1， 采用业界领先的掉电保护技术，令您的数据安全无忧 2， 性能卓越，拥有单盘高达250MB/s的写带宽 3， 单盘64GB~512GB大容量可选，存储容量大小也可以根据用户需求定制 4， 支持Camera Link视频输入接口 5， 支持DVI显示接口 6， 支持SFP光纤接口 7， 支持2个SSD盘 8， 支持1个千兆以太网口 9， 满足各种恶劣环境应用要求，能在高温度、多灰尘、高海拔、强振动等应用场合下正常使用 TMS-S231采用12V电源适配器供电，功耗小于10W，TMS-S231集成度非常高，产品体积仅为260mm x 180mm x 45mm，如上图所示。TMS-S231现已进入大批量生产阶段并随时接受客户试用申请与订货。
上传时间： 2013-11-12
上传用户：a155166
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
上传时间： 2014-12-30
上传用户：aysyzxzm
Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.
上传时间： 2013-10-18
上传用户：myworkpost
采用60 Co 作为辐射源模拟空间辐射环境, 对光纤陀螺及其光电器件进行了大量的试验, 并对光纤陀螺及其光电器件受空间辐射影响的机理进行了研究, 得出光纤陀螺光电器件中保偏光纤环受辐射影响最严 重, 从而重点分析了光纤陀螺敏感器件保偏光纤环的辐射影响机理, 从原理上探讨了保偏光纤环在辐射条件下损耗的增加对光纤陀螺的影响, 为光纤陀螺抗辐射加固技术提供了理论基础。
上传时间： 2013-10-08
上传用户：pei5
The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted atconsumer, industrial, medical, and communication markets. To optimize system powerconsumption, the LPC314x have multiple power domains and a very flexible ClockGeneration Unit (CGU) that provides dynamic clock gating and scaling.
上传时间： 2013-10-11
上传用户：yuchunhai1990
本软件是关于MAX338, MAX339的英文数据手册：MAX338, MAX339 8通道/双4通道、低泄漏、CMOS模拟多路复用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上传时间： 2013-11-12
上传用户：18711024007
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
标签： Transceiver Virtex Wizar GTP
上传时间： 2013-10-20
上传用户：dave520l
磁芯电感器的谐波失真分析 摘 要：简述了改进铁氧体软磁材料比损耗系数和磁滞常数ηB，从而降低总谐波失真THD的历史过程，分析了诸多因数对谐波测量的影响，提出了磁心性能的调控方向。 关键词：比损耗系数， 磁滞常数ηB ，直流偏置特性DC-Bias，总谐波失真THD Analysis on THD of the fer rite co res u se d i n i nductancShi Yan Nanjing Finemag Technology Co. Ltd., Nanjing 210033 Abstract: Histrory of decreasing THD by improving the ratio loss coefficient and hysteresis constant of soft magnetic ferrite is briefly narrated. The effect of many factors which affect the harmonic wave testing is analysed. The way of improving the performance of ferrite cores is put forward. Key words: ratio loss coefficient，hysteresis constant，DC-Bias，THD 近年来，变压器生产厂家和软磁铁氧体生产厂家，在电感器和变压器产品的总谐波失真指标控制上，进行了深入的探讨和广泛的合作，逐步弄清了一些似是而非的问题。从工艺技术上采取了不少有效措施，促进了质量问题的迅速解决。本文将就此热门话题作一些粗浅探讨。 一、 历史回顾 总谐波失真（Total harmonic distortion） ，简称THD，并不是什么新的概念，早在几十年前的载波通信技术中就已有严格要求<1>。1978年邮电部公布的标准YD/Z17－78“载波用铁氧体罐形磁心”中，规定了高μQ材料制作的无中心柱配对罐形磁心详细的测试电路和方法。如图一电路所示，利用LC组成的150KHz低通滤波器在高电平输入的情况下测量磁心产生的非线性失真。这种相对比较的实用方法，专用于无中心柱配对罐形磁心的谐波衰耗测试。 这种磁心主要用于载波电报、电话设备的遥测振荡器和线路放大器系统，其非线性失真有很严格的要求。 图中 ZD —— QF867 型阻容式载频振荡器，输出阻抗 150Ω， Ld47 —— 47KHz 低通滤波器，阻抗 150Ω，阻带衰耗大于61dB， Lg88 ——并联高低通滤波器，阻抗 150Ω，三次谐波衰耗大于61dB Ld88 ——并联高低通滤波器，阻抗 150Ω，三次谐波衰耗大于61dB FD —— 30～50KHz 放大器， 阻抗 150Ω， 增益不小于 43 dB，三次谐波衰耗b3(0)≥91 dB, DP —— Qp373 选频电平表，输入高阻抗， L ——被测无心罐形磁心及线圈， C ——聚苯乙烯薄膜电容器CMO-100V-707APF±0.5%,二只。 测量时，所配用线圈应用丝包铜电磁线SQJ9×0.12(JB661-75)在直径为16.1mm的线架上绕制 120 匝， （线架为一格） ， 其空心电感值为 318μH（误差1％） 被测磁心配对安装好后，先调节振荡器频率为 36.6～40KHz， 使输出电平值为+17.4 dB， 即选频表在 22′端子测得的主波电平 （P2）为+17.4 dB，然后在33′端子处测得输出的三次谐波电平（P3）， 则三次谐波衰耗值为：b3(+2)= P2+S+ P3 式中：S 为放大器增益dB 从以往的资料引证， 就可以发现谐波失真的测量是一项很精细的工作，其中测量系统的高、低通滤波器，信号源和放大器本身的三次谐波衰耗控制很严，阻抗必须匹配，薄膜电容器的非线性也有相应要求。滤波器的电感全由不带任何磁介质的大空心线圈绕成，以保证本身的“洁净” ，不至于造成对磁心分选的误判。 为了满足多路通信整机的小型化和稳定性要求， 必须生产低损耗高稳定磁心。上世纪 70 年代初，1409 所和四机部、邮电部各厂，从工艺上改变了推板空气窑烧结，出窑后经真空罐冷却的落后方式，改用真空炉，并控制烧结、冷却气氛。技术上采用共沉淀法攻关试制出了μQ乘积 60 万和 100 万的低损耗高稳定材料，在此基础上，还实现了高μ7000～10000材料的突破，从而大大缩短了与国外企业的技术差异。当时正处于通信技术由FDM（频率划分调制）向PCM（脉冲编码调制） 转换时期， 日本人明石雅夫发表了μQ乘积125 万为 0.8×10 ，100KHz）的超优铁氧体材料<3>，其磁滞系数降为优铁
上传时间： 2013-12-15
上传用户：天空说我在
