18B20和单总线的时序及其工作原理,51单片机控制的18B20程序(包括多个18B20的程序)18B20 and single-bus timing and its working principle, control of 51 single-chip 18B20 procedures (including procedures for more than 18B20)
标签： 18B20 single-bus and principl
上传时间： 2017-08-10
上传用户：wang5829
A programmable digital signal processor (PDSP) is a special-purpose microprocessor with specialized architecture and instruction set for implementing DSP algorithms. Typical architectural features include multiple memory partitions (onchip, off-chip, data memory, program memory, etc.), multiple (generally pipelined) arithmetic and logic units (ALUs), nonuniform register sets, and extensive hardware numeric support [1,2]. Single-chip PDSPs have become increasingly popular for real-time DSP applications [3,4].
标签： special-purpose microprocessor programmable specialized
上传时间： 2017-08-13
上传用户：脚趾头
The potential of solving real-time demanding industrial applications, using vision-based algorithms, drastically grew due to an increasing availability of computational power. In this thesis a novel real-time, vision-based Blackjack analysis system is presented. The embedding of the vision algorithms in a compound system of other information sources such as an electronic chip tray, reduces the vision task to detect cards and chips. Robust results are achieved by not just analyzing single frames but an image stream regarding game-ß ow informations. The requirements for such a system are a highly robust and adaptive behav- ior. This is motivated by the vital interest of casino entrepreneurs in a 100 statistical analysis of their offered gambling in order to support the business plan, measuring table and dealer performance and give accurate player rating. Extensive experiments show the robustness and applicability of the proposed system.
标签： applications vision-based algorithms industrial
上传时间： 2017-08-20
上传用户：liansi
This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
标签： This microprocessor describes S3C2410X
上传时间： 2014-01-11
上传用户：shizhanincc
The STi7105 uses state of the art process technology to provide an ultra low-cost, fully featured HD AVC decoder IC. It is a highly integrated system-on-chip suitable for STB markets across all networks (cable/satellite/DTT/x- DSL/IP) worldwide
标签： technology low-cost featured process
上传时间： 2013-12-22
上传用户：时代电子小智
Genode FX is a composition of hardware and software components that enable the creation of fully fledged graphical user interfaces as system-on-chip solutions using commodity FPGAs.
标签： composition components hardware creation
上传时间： 2017-09-24
上传用户：huql11633
An Overview of Smart Card Security. The smart card, an intelligent token, is a credit card sized plastic card embedded with an integrated circuit chip. It provides not only memory capacity, but computational capability as well. The self-containment of smart card makes it resistant to attack as it does not need to depend upon potentially vulnerable external resources. Because of this characteristic, smart cards are often used in different applications which require strong security protection and authentication.
标签： card intelligent Overview Security
上传时间： 2017-09-25
上传用户：busterman
钽电容封装，从A-E都有，方便用于使用钽电容设计的电路，希望对大家能有帮助
上传时间： 2015-03-01
上传用户：久久jiujiu
FILE NAME: dc_motor.c chip TYPE: ATMEGA16 CLOCK FREQUENCY: 8MHZ IDE: VSMStudio COMPILER: AVR-GCC
标签： PWM
上传时间： 2015-03-01
上传用户：abilibili
随着微电子技术的迅猛发展，集成电路组成的电子系统集成度越来越高，使得芯片 的复杂性不断上升，单片的成本却不断降低。FPGA产品的逻辑单元越来越多，性能越 来越高，单位成本和功耗向越来越低的方向发展，使得可编程片上系统SOPC(System On Programmable chip)设计成为必然趋势。SD存储卡因具备体积小、储容量高、可擦写、 价格低以及非易失性等特点被广泛应用于手机、数码相机、MP3播放器等领域。 美国Altera公司开发的基于SOPC技术的Nios U嵌入式处理器，是一个可变结构、 通用型的32位RISC嵌入式处理器，设计者可以非常方便地使用SOPC Builder系统开 发工具设计构造以处理器为基础的系统，针对自己的要求配置Nios II软核、Avalon总 线及外围接口系统，体现了面向用户，面向应用的SOPC技术设计思想。应用与Nios II 相关的集成开发平台和辅助开发工具，加快了NiosⅡ系统的设计与验证环节的开发速 度，对于嵌入式系统的产品开发和应用，具有广泛的价值和积极的意义。 本文介绍了基于Nios II嵌入式处理器的SOPC系统的软、硬件设计方法，结合实 验平台资源特点，构建了基于Nios II软核处理器的SD
上传时间： 2015-05-25
上传用户：wjc511
