MSP430-JTAG-Adapter:MSP430-JTAG doesn’t need external power supply, as MSP430 microcontrollers require only 3-5 mA WHILE programming and all necessary power supply is taken from the LPT port.
标签： MSP 430 microcontrollers JTAG-Adapter
上传时间： 2013-12-25
上传用户：洛木卓
Expert Choice represents a significant contribution to the decision making process 工t assists a decision maker in solving complex problems involving many criteria and several courses of action . An Expert Choice solution to a problem reflects the expertise of the decision maker , not the computer . Behavioral scientists have spent many years studying the human mind and how it makes decisions . They have found that humans are influenced by their previous experiences and this causes them to have biases . Basic instincts , preferences and environmental factors also play key roles in how we analyze data and make decisions . There 15 way to remove these factors from human decision making , nor would we necessarily want to , but as the problems of our world become more and more complex , it 15 necessary for us to employ a framework to help make more logical and less biased decisions WHILE still taking our feelings and intuition into consideration .
标签： contribution significant represents decision
上传时间： 2015-06-02
上传用户：gmh1314
min_Pascal语言的语法，其中<循环语句>改为 ::= do<语句> WHILE<条件>。压缩包中还包括5个测试用例。 另外，如要文档，请给我邮件。
标签： min_Pascal 语言
上传时间： 2015-06-03
上传用户：qunquan
Single-layer neural networks can be trained using various learning algorithms. The best-known algorithms are the Adaline, Perceptron and Backpropagation algorithms for supervised learning. The first two are specific to single-layer neural networks WHILE the third can be generalized to multi-layer perceptrons.
标签： Single-layer algorithms best-known networks
上传时间： 2015-06-17
上传用户：赵云兴
The J2000 codec was written in an effort to produce the cleanest and simplest implementation possible of the JPEG-2000 standard. We have put a particular emphasis on good architecture design and code simplicity, WHILE at the same time providing an implementation as complete and efficient as possible. The source code for the codec is freely available for anyone to study or even for use in commercial programs. We hope that our open development process and our focus on clean, straightforward code will help make the J2000 codec become a reference implementation of the JPEG-2000 standard
标签： implementation cleanest simplest produce
上传时间： 2015-07-03
上传用户：dengzb84
1. PL/0 语言介绍 ●PL/0 程序设计语言是一个较简单的语言，它以赋值语句为基础，构造概念有顺序、条件和重复（循环）三种。PL/0 有子程序概念，包括过程定义（可以嵌套）与调用且有局部变量说明。PL/0语言编译程序采用以语法分析为核心、一遍扫描的编译方法。词法分析和代码生成作为独立的子程序供语法分析程序调用。语法分析的同时，提供了出错报告和出错恢复的功能。在源程序没有错误编译通过的情况下，调用类PCODE解释程序解释执行生成的类PCODE代码。 ●保留字(关键字)：所谓保留字是指在Pascal语言中具有特定的含义。标准Pascal语言中的保留字一共有35个，Turbo Pascal语言一共有51个。下面是Pascal语言的保留字：AND，ARRAY，BEGIN，CASE，CONST，DIV，DO，DOWNTO，ELSE，END，FILE，FOR，FUNTION，GOTO，IF，IN，LABEL，MOD，NIL，NOT，OF，OR，PACKED，PROCEDURE，PROGRAM，RECORD，REPEAT，SET，THEN，TO，TYPE，UNTIL，VAR，WHILE，WITH，EXPORTS，SHR，STRING，ASM，OBJECT，UNIT，CONSTRUCTOR，IMPLEMENTATION，DESTRUCTOR，USES，INHERITED，INLINE，INTERFACE，LIBRARY，XOR，SHL
上传时间： 2015-07-17
上传用户：zm7516678
his project was built and tested with WinAVR-20060125. Make sure the MCU target define in the Makefiles corresponds to the AVR you are using!! To build the code, just install WinAVR and run "make" from the console in echomaster and echoslave subdirs. "make program" will program the device if you have a AVRISP attached. Remember to set the AVR device to at least 8MHz. The AVR may use the programmable clock from MC1319x, just remember to check if the MC1319x and SPI communication is working FIRST! Otherwise you wont get any clock signal to the AVR and then you can t program it or reset the fuses! The MC1319x has default clock output of 32kHz so you will have to set your programmer to a very low frequency (<=32kHz/4) to be able to program it WHILE it is running on that!
标签： the 20060125 project WinAVR
上传时间： 2014-10-10
上传用户：yan2267246
关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, WHILE the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
标签： investigates implementing pipelines circuits
上传时间： 2015-07-26
上传用户：CHINA526
Coriander is a GUI for controlling a Digital Camera (in the sense of the IIDC specs issued by the 1394 Trade Association [1]). Due to the properties of the IEEE1394 protocol, Coriander can control an IEEE1394 camera without interferring with the image flow from that camera. It can thus be used to setup a camera with Coriander WHILE the video flow is used by another application
标签： the controlling Coriander Digital
上传时间： 2015-08-07
上传用户：TF2015
一个基于网格和最近邻居的聚类算法 Similarity(x, y) = size ( SKNN(x) SKNN(y) )，WHILE Link(x, y)=1
标签： SKNN Similarity size 网格
上传时间： 2014-01-14
上传用户：zhangliming420
