C++ Algorithms for Digital Signal Processing 第4章 滤波器程序
标签： Algorithms Processing Digital Signal
上传时间： 2013-08-01
上传用户：eeworm
·[时钟书籍]Digital Clocks for Synchronization and Communications
标签： nbsp Synchronization Communications Digital
上传时间： 2013-05-24
上传用户：tgeyangjh
·[测试书籍]ESSENTIALS OF ELECTRONIC TESTING FOR Digital, MEMORY AND MIXED-SIGNAL VLSI CIRCUITS
标签： nbsp ESSENTIALS ELECTRONIC Digital
上传时间： 2013-07-21
上传用户：euroford
·Verilog HDL: A Guide to Digital Design and
标签： nbsp Verilog Digital Design
上传时间： 2013-04-24
上传用户：谁偷了我的麦兜
·Stanford&IBM牛人经典之作 - Digital Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of Digital computers in the real-time co
标签： nbsp Hardcover Digital Control
上传时间： 2013-07-31
上传用户：cuiyashuo
Digital Down Converter Design based on FPGA.
标签： Converter Digital Design based
上传时间： 2013-08-13
上传用户：CSUSheep
直接数字频率合成（Direct Digital Fraquency Synthesis,即DDFS，一般简称DDS）是从相位概念出发直接合成所需要波形的一种新的频率合成技术。
标签： Fraquency Synthesis Digital Direct
上传时间： 2013-08-27
上传用户：wpt
My thesis entitled \"fpga Digital clock,\" immature, to enlighten
上传时间： 2013-08-31
上传用户：smallfish
Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
标签： Implementation Recovery Receiver Software
上传时间： 2013-09-05
上传用户：panpanpan
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any Digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-22
上传用户：han_zh
