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StANDard

  • 微型计算机总线知识

    计算机部件要具有通用性,适应不同系统与不同用户的需求,设计必须模块化。计算机部件产品(模块)供应出现多元化。模块之间的联接关系要标准化,使模块具有通用性。模块设计必须基于一种大多数厂商认可的模块联接关系,即一种总线标准。总线的标准总线是一类信号线的集合是模块间传输信息的公共通道,通过它,计算机各部件间可进行各种数据和命令的传送。为使不同供应商的产品间能够互换,给用户更多的选择,总线的技术规范要标准化。总线的标准制定要经周密考虑,要有严格的规定。总线标准(技术规范)包括以下几部分:机械结构规范:模块尺寸、总线插头、总线接插件以及按装尺寸均有统一规定。功能规范:总线每条信号线(引脚的名称)、功能以及工作过程要有统一规定。电气规范:总线每条信号线的有效电平、动态转换时间、负载能力等。总线的发展情况S-100总线:产生于1975年,第一个标准化总线,为微计算机技术发展起到了推动作用。IBM-PC个人计算机采用总线结构(Industry StANDard Architecture, ISA)并成为工业化的标准。先后出现8位ISA总线、16位ISA总线以及后来兼容厂商推出的EISA(Extended ISA)32位ISA总线。为了适应微处理器性能的提高及I/O模块更高吞吐率的要求,出现了VL-Bus(VESA Local Bus)和PCI(Peripheral Component Interconnect,PCI)总线。适合小型化要求的PCMCIA(Personal Computer Memory Card International Association)总线,用于笔记本计算机的功能扩展。总线的指标计算机主机性能迅速提高,各功能模块性能也要相应提高,这对总线性能提出更高的要求。总线主要技术指标有几方面:总线宽度:一次操作可以传输的数据位数,如S100为8位,ISA为16位,EISA为32位,PCI-2可达64位。总线宽度不会超过微处理器外部数据总线的宽度。总数工作频率:总线信号中有一个CLK时钟,CLK越高每秒钟传输的数据量越大。ISA、EISA为8MHz,PCI为33.3MHz, PCI-2可达达66.6MHz。单个数据传输周期:不同的传输方式,每个数据传输所用CLK周期数不同。ISA要2个,PCI用1个CLK周期。这决定总线最高数据传输率。5. 总线的分类与层次系统总线:是微处理器芯片对外引线信号的延伸或映射,是微处理器与片外存储器及I/0接口传输信息的通路。系统总线信号按功能可分为三类:地址总线(Where):指出数据的来源与去向。地址总线的位数决定了存储空间的大小。系统总线:数据总线(What)提供模块间传输数据的路径,数据总线的位数决定微处理器结构的复杂度及总体性能。控制总线(When):提供系统操作所必需的控制信号,对操作过程进行控制与定时。扩充总线:亦称设备总线,用于系统I/O扩充。与系统总线工作频率不同,经接口电路对系统总统信号缓冲、变换、隔离,进行不同层次的操作(ISA、EISA、MCA)局部总线:扩充总线不能满足高性能设备(图形、视频、网络)接口的要求,在系统总线与扩充总线之间插入一层总线。由于它经桥接器与系统总线直接相连,因此称之为局部总线(PCI)。

    标签: 微型计算机 总线

    上传时间: 2013-11-09

    上传用户:nshark

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a StANDard DB 9-pin male serial port connector inone end and a StANDard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    标签: Adapter Serial 2303 USB

    上传时间: 2013-11-01

    上传用户:ghostparker

  • at89c52 pdf

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-StANDard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.

    标签: 89c c52 at

    上传时间: 2013-11-10

    上传用户:1427796291

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y StANDard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-13

    上传用户:瓦力瓦力hong

  • 采用TÜV认证的FPGA开发功能安全系统

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s StANDard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the StANDard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This StANDard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative StANDards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System

    标签: FPGA 安全系统

    上传时间: 2013-11-05

    上传用户:维子哥哥

  • WP401-FPGA设计的DO-254

    The StANDard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable StANDardsin the avionic industry. While information on thegeneral aspects of the StANDard is easy to obtain, thedetails of exactly how to implement the StANDard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    标签: FPGA 401 254 WP

    上传时间: 2013-11-12

    上传用户:q123321

  • WP328-FPGA的语音数据融合

      The SDI StANDards are the predominant StANDards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI StANDard,SD-SDI, allowed StANDard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.

    标签: FPGA 328 WP 语音

    上传时间: 2013-10-08

    上传用户:yjj631

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with StANDard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-22

    上传用户:685

  • Virtex-5 GTP Transceiver Wizar

    The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry StANDards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry StANDard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts

    标签: Transceiver Virtex Wizar GTP

    上传时间: 2013-10-23

    上传用户:leyesome

  • tcp ip协议详解 中文版PDF

    很多不同的厂家生产各种型号的计算机,它们运行完全不同的操作系统,但TCP.IP协议族允许它们互相进行通信。这一点很让人感到吃惊,因为它的作用已远远超出了起初的设想。T C P / I P起源于6 0年代末美国政府资助的一个分组交换网络研究项目,到9 0年代已发展成为计算机之间最常应用的组网形式。它是一个真正的开放系统,因为协议族的定义及其多种实现可以不用花钱或花很少的钱就可以公开地得到。它成为被称作“全球互联网”或“因特网(Internet)”的基础,该广域网(WA N)已包含超过1 0 0万台遍布世界各地的计算机。本章主要对T C P / I P协议族进行概述,其目的是为本书其余章节提供充分的背景知识。 TCP.IP协议 缩略语 ACK (ACKnowledgment) TCP首部中的确认标志 API (Application Programming Interface) 应用编程接口 ARP (Address Resolution Protocol) 地址解析协议 ARPANET(Defense Advanced Research Project Agency NETwork) (美国)国防部远景研究规划局 AS (Autonomous System) 自治系统 ASCII (American StANDard Code for Information Interchange) 美国信息交换标准码 ASN.1 (Abstract Syntax Notation One) 抽象语法记法1 BER (Basic Encoding Rule) 基本编码规则 BGP (Border Gateway Protocol) 边界网关协议 BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名 BOOTP (BOOTstrap Protocol) 引导程序协议 BPF (BSD Packet Filter) BSD 分组过滤器 CIDR (Classless InterDomain Routing) 无类型域间选路 CIX (Commercial Internet Exchange) 商业互联网交换 CLNP (ConnectionLess Network Protocol) 无连接网络协议 CRC (Cyclic Redundancy Check) 循环冗余检验 CSLIP (Compressed SLIP) 压缩的S L I P CSMA (Carrier Sense Multiple Access) 载波侦听多路存取 DCE (Data Circuit-terminating Equipment) 数据电路端接设备 DDN (Defense Data Network) 国防数据网 DF (Don’t Fragment) IP首部中的不分片标志 DHCP (Dynamic Host Configuration Protocol) 动态主机配置协议 DLPI (Data Link Provider Interface) 数据链路提供者接口 DNS (Domain Name System) 域名系统 DSAP (Destination Service Access Point) 目的服务访问点 DSLAM (DSL Access Multiplexer) 数字用户线接入复用器 DSSS (Direct Sequence Spread Spectrum) 直接序列扩频 DTS (Distributed Time Service) 分布式时间服务 DVMRP (Distance Vector Multicast Routing Protocol) 距离向量多播选路协议 EBONE (European IP BackbONE) 欧洲I P主干网 EOL (End of Option List) 选项清单结束 EGP (External Gateway Protocol) 外部网关协议 EIA (Electronic Industries Association) 美国电子工业协会 FCS (Frame Check Sequence) 帧检验序列 FDDI (Fiber Distributed Data Interface) 光纤分布式数据接口 FIFO (First In, First Out) 先进先出 FIN (FINish) TCP首部中的结束标志 FQDN (Full Qualified Domain Name) 完全合格的域名 FTP (File Transfer Protocol) 文件传送协议 HDLC (High-level Data Link Control) 高级数据链路控制 HELLO 选路协议 IAB (Internet Architecture Board) Internet体系结构委员会 IANA (Internet Assigned Numbers Authority) Internet号分配机构 ICMP (Internet Control Message Protocol) Internet控制报文协议 IDRP (InterDomain Routing Protocol) 域间选路协议 IEEE (Institute of Electrical and Electronics Engineering) (美国)电气与电子工程师协会 IEN (Internet Experiment Notes) 互联网试验注释 IESG (Internet Engineering Steering Group) Internet工程指导小组 IETF (Internet Engineering Task Force) Internet工程专门小组 IGMP (Internet Group Management Protocol) Internet组管理协议 IGP (Interior Gateway Protocol) 内部网关协议 IMAP (Internet Message Access Protocol) Internet报文存取协议 IP (Internet Protocol) 网际协议 I RTF (Internet Research Task Force) Internet研究专门小组 IS-IS (Intermediate System to Intermediate System Protocol) 中间系统到中间系统协议 ISN (Initial Sequence Number) 初始序号 ISO (International Organization for StANDardization) 国际标准化组织 ISOC (Internet SOCiety) Internet协会 LAN (Local Area Network) 局域网 LBX (Low Bandwidth X) 低带宽X LCP (Link Control Protocol) 链路控制协议 LFN (Long Fat Net) 长肥网络 LIFO (Last In, First Out) 后进先出 LLC (Logical Link Control) 逻辑链路控制 LSRR (Loose Source and Record Route) 宽松的源站及记录路由 MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干网 MIB (Management Information Base) 管理信息库 MILNET (MILitary NETwork) 军用网 MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t邮件扩充 MSL (Maximum Segment Lifetime) 报文段最大生存时间 MSS (Maximum Segment Size) 最大报文段长度 M TA (Message Transfer Agent) 报文传送代理 MTU (Maximum Transmission Unit) 最大传输单元 NCP (Network Control Protocol) 网络控制协议 NFS (Network File System) 网络文件系统 NIC (Network Information Center) 网络信息中心 NIT (Network Interface Tap) 网络接口栓(S u n公司的一个程序) NNTP (Network News Transfer Protocol) 网络新闻传送协议 NOAO (National Optical Astronomy Observatories) 国家光学天文台 NOP (No Operation) 无操作 NSFNET (National Science Foundation NETwork) 国家科学基金网络 NSI (NASA Science Internet) (美国)国家宇航局I n t e r n e t NTP (Network Time Protocol) 网络时间协议 NVT (Network Virtual Terminal) 网络虚拟终端 OSF (Open Software Foudation) 开放软件基金 OSI (Open Systems Interconnection) 开放系统互连 OSPF (Open Shortest Path First) 开放最短通路优先 PAWS (Protection Against Wrapped Sequence number) 防止回绕的序号 PDU (Protocol Data Unit) 协议数据单元 POSIX (Portable Operating System Interface) 可移植操作系统接口 PPP (Point-to-Point Protocol) 点对点协议 PSH (PuSH) TCP首部中的急迫标志 RARP (Reverse Address Resolution Protocol) 逆地址解析协议 RFC (Request For Comments) Internet的文档,其中的少部分成为标准文档 RIP (Routing Information Protocol) 路由信息协议 RPC (Remote Procedure Call) 远程过程调用 RR (Resource Record) 资源记录 RST (ReSeT) TCP首部中的复位标志 RTO (Retransmission Time Out) 重传超时 RTT (Round-Trip Time) 往返时间 SACK (Selective ACKnowledgment) 有选择的确认 SLIP (Serial Line Internet Protocol) 串行线路I n t e r n e t协议 SMI (Structure of Management Information) 管理信息结构 SMTP (Simple Mail Transfer Protocol) 简单邮件传送协议 SNMP (Simple Network Management Protocol) 简单网络管理协议 SSAP (Source Service Access Point) 源服务访问点 SSRR (Strict Source and Record Route) 严格的源站及记录路由 SWS (Silly Window Syndrome) 糊涂窗口综合症 SYN (SYNchronous) TCP首部中的同步序号标志 TCP (Transmission Control Protocol) 传输控制协议 TFTP (Trivial File Transfer Protocol) 简单文件传送协议 TLI (Transport Layer Interface) 运输层接口 TTL (Ti m e - To-Live) 生存时间或寿命 TUBA (TCP and UDP with Bigger Addresses) 具有更长地址的T C P和U D P Telnet 远程终端协议 UA (User Agent) 用户代理 UDP (User Datagram Protocol) 用户数据报协议 URG (URGent) TCP首部中的紧急指针标志 UTC (Coordinated Universal Time) 协调的统一时间 UUCP (Unix-to-Unix CoPy) Unix到U n i x的复制 WAN (Wide Area Network) 广域网 WWW (World Wide Web) 万维网 XDR (eXternal Data Representation) 外部数据表示 XID (transaction ID) 事务标识符 XTI (X/Open Transport Layer Interface) X/ O p e n运输层接口

    标签: tcp 协议

    上传时间: 2013-11-13

    上传用户:tdyoung