DRBD Replicated Storage with Shared Disk Semantics
标签： Replicated Semantics Storage Shared
上传时间： 2014-01-05
上传用户：lhw888
If your application uses MFC in a Shared DLL, and your application is in a language other than the operating system s current language, you will need to copy the corresponding localized resources MFC42XXX.DLL from the Microsoft Visual C++ CD-ROM onto the system or system32 directory, and rename it to be MFCLOC.DLL. ("XXX" stands for the language abbreviation. For example, MFC42DEU.DLL contains resources translated to German.) If you don t do this, some of the UI elements of your application will remain in the language of the operating system.
标签： application your language Shared
上传时间： 2014-01-02
上传用户：iswlkje
linux下用C语言写的聊天程序！/*BUG and NOTE: Not join protect to Shared Memory Segments,example Semaphore Arrays. Not check the parameters validity. When transmit may be error. If the client program no right exit,others cannot know,the service program shouldbe check the client program whether exist timing. The program when exit(), it do not delete the Shared Memory Segments,you maybe use atexit() but the program have some processes. When one process is exit(),others is continue. The service program s action is few. And so on. */
标签： Semaphore Segments example protect
上传时间： 2014-01-25
上传用户：xhz1993
dgstation relook 400 sample code to run Shared plugin process in background.
标签： background dgstation process relook
上传时间： 2017-02-01
上传用户：wpt
Linux Shared Memory Sample code
标签： Shared Memory Sample Linux
上传时间： 2014-01-01
上传用户：缥缈
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a Shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-14
上传用户：fdmpy
The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blocks use a PLA configuration that allowsall product terms to be routed and Shared among any of the macrocells of the functionblock.
上传时间： 2013-11-03
上传用户：1037540470
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a Shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
This directory contains 3 file system modules: - file system ISO9660 iso9660.c iso9660.h - file system FAT12/16 fat.c fat.h - file system FAT32 fat32.c fat32.h file.c and file.h contains all high levels functions/macro/definition for your application. fs_variable.c contains all definitions of variables that can be Shared with the all file systems. config.h must contain the definition of the file system used by your application.
标签： 9660 file system directory
上传时间： 2015-03-15
上传用户：脚趾头
RTX51 example use. Inside are example on how to use RTX51 RTOS. it uses memory pool, messages, RTXbank and Shared var
上传时间： 2013-11-27
上传用户：gundan
