Test program to loop on Successive Approximation A-to-D conversion. Allows digital codes and resulting DAC output to be viewed on scope.
标签： Approximation Successive conversion program
上传时间： 2015-08-07
上传用户：顶得柱
Various routines that simulate or compute aspects of digital communication systems
标签： communication routines simulate Various
上传时间： 2014-01-20
上传用户：lindor
Digital Clock in Assembly 我的一个大学满分VHDL作品，数字石英钟的模拟程序。
标签： Assembly Digital Clock VHDL
上传时间： 2014-01-25
上传用户：hullow
book:simulation and softeware radiao for mibole code:psk-based digital transmission schemes ofdm transmission technology cdma transmission technology multiple access protocals cellular telecommunication systems
标签： transmission simulation psk-based softeware
上传时间： 2015-08-11
上传用户：003030
Digital cellular telecommunications system (Phase 2+) AT command set for GSM Mobile Equipment (ME) (GSM 07.07 version 7.4.0 Release 1998)
标签： telecommunications Equipment cellular Digital
上传时间： 2014-12-05
上传用户：xzt
advanced digital design with the verilog hdl
标签： advanced digital verilog design
上传时间： 2013-12-15
上传用户：爺的气质
MODE_Switch1Processing multi-interrupt request needs to set the priority of these interrupt requests. The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the IRQ flag set doesn t mean the system to execute the interrupt vector. The IRQ flags can be triggered by the events without interrupt enable. Just only any the event occurs and the IRQ will be logic "1".
标签： multi-interrupt MODE_Switch Processing interrupt
上传时间： 2013-12-04
上传用户：zhichenglu
Study of Digital Modulation Schemes using DDS
标签： Modulation Digital Schemes Study
上传时间： 2015-08-17
上传用户：GavinNeko
关于Digital Signal Process中FIR ， IIR滤波器的设计与实现
标签： Digital Process Signal FIR
上传时间： 2013-12-23
上传用户：1966640071
My thesis entitled "fpga digital clock," immature, to enlighten
标签： enlighten entitled immature digital
上传时间： 2014-01-02
上传用户：hxy200501
