Who Moved My Cheese。大家都看过书本上的内容。
上传时间： 2014-01-21
上传用户：zhuoying119
s1d13xxxfb.c for 13506 ,on the board of YL9200,it have been Moved to the liunx2.6.13
上传时间： 2014-01-11
上传用户：xc216
lfsThe LFS FTP archive has been Moved to a new server which is reachable under the na packages.linuxfromscratch.org. The reason for the move is that this new server sits on lot more bandwidth to spare.
标签： reachable packages archive lfsThe
上传时间： 2014-10-13
上传用户：开怀常笑
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams Moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-14
上传用户：fdmpy
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams Moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
Writing an Input Module The sample module introduced here is called idiom (Input Device for Intercepting Output of Mice), The sample module registers itself with the USB kernel subsystem as a mouse driver and with the input management subsystem as a keyboard driver. idiom translates mouse movement events into keyboard input events: it reports arrow events to the input system according to how the physical mouse is Moved.
标签： Input introduced Writing Device
上传时间： 2015-06-25
上传用户：731140412
HDOJ 1047 One of the first users of BIT s new supercomputer was Chip Diller. He extended his exploration of powers of 3 to go from 0 to 333 and he explored taking various sums of those numbers. ``This supercomputer is great, remarked Chip. ``I only wish Timothy were here to see these results. (Chip Moved to a new apartment, once one became available on the third floor of the Lemon Sky apartments on Third Street.)
标签： supercomputer extended Diller explor
上传时间： 2013-12-22
上传用户：黑漆漆
Abstract: By using gateway systems on large 32-bit platforms, networks of small, 8- and 16-bit microcontrollers can be monitored and controlled over the Internet. With embedded Linux, these gateways are easily Moved from full-blown host PCs to embedded platforms like the PC104. In this class you will learn about hardware platforms that support embedded Linux, Linux kernel configuration, feature selection, installation, booting and tuning.
标签： bit platforms Abstract networks
上传时间： 2014-01-05
上传用户：kytqcool
Parking Lot Simulation： Parking lot attendants often park cars bumper-to-bumper, several cars deep. This maximizes the number of cars they can fit into a parking lot at the expense of complicating the process of retrieving someone s car when they want to leave. Consider the case of a person wanting to leave the parking lot but their car is parked in the back of a row of cars. In this case, all the cars parked in front of this person s car must be temporarily Moved to allow this person to leave.
标签： Parking cars bumper-to-bumper Simulation
上传时间： 2016-02-15
上传用户：lepoke
CPU的code banking技术实例： This Zip file contains five (3) folders: FastChip Project Files * This folder contains a folder called "Bank" that should be Moved into: <install_root>\FastChip\Projects Keil Project Files * These files are to be put into the directory of your choice and the project is to be opened from within Keil Hex Files * These files are the output of Keil. If you do not want to compile and link all of the code, these files can be loaded into FastChip directly
标签： This FastChip contains banking
上传时间： 2016-10-01
上传用户：a3318966
