vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等
上传时间： 2013-12-26
上传用户：363186
内容如下： 1.The history of the computerized database 2.SQL Data Statements--those used to create, manipulate, and retrieve data stored in your database example statements include select, update, insert, and delete 3.SQL Schema Statements--those used to create database objects, such as tables, indexes, and constraints 4.How data sets can interact with queries 5.The importance of subqueries 6.Data conversion and manipulation via SQL s built-in functions 7.How conditional Logic can be used in Data Statements
标签： computerized Statements database history
上传时间： 2015-04-25
上传用户：ardager
This example program shows how to configure and use the A/D Converter of the following microcontroller: STMicroelectronics ST10F166 After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port. To run this program... Build the project (Project Menu, Build Target) Start the debugger (Debug Menu, Start/Stop Debug Session) View the Serial Window (View Menu, Serial Window #1) View the A/D converter peripheral (Peripheral Menu, A/D Converter) Run the program (Debug Menu, Go) A debug script (debug.ini) creates buttons that set different analog values in A/D channels. As the program runs, you will see the A/D input and output change. Other buttons create signals that generate sine wave or sawtooth patterns as analog inputs. µ Vision3 users may enable the built-in Logic Analyzer to view, measure and compare these input signals graphically.
标签： microcontroll Converter configure following
上传时间： 2014-12-01
上传用户：独孤求源
The subject which is to us propos¨¦ is as follows: calculation of the degr¨¦ d¡ ¯ inconsistance d¡ ¯ un Logical program possibilist in C++. We thus work on a Logical program possibilist, it be-¨¤-statement a Logical program resulting from non-classique Logic. The goal first of this project is of d¨¦ terminer if a Logical program is consisting or not of share the calculation of sound degr¨¦ d¡ ¯ inconsistance.
标签： brvbar calculation subject follows
上传时间： 2013-12-18
上传用户：yulg
machine learning, accuracy estimation, cross-validation, bootstrap, ID3, decision trees, decision graphs, naive-bayes, decision tables, majority, induction algorithms, classifiers, categorizers, general Logic diagrams, instance-based algorithms, discretization, lazy learning, bagging, MineSet.
标签： decision cross-validation estimation bootstrap
上传时间： 2015-07-26
上传用户：赵云兴
关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA Logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
标签： investigates implementing pipelines circuits
上传时间： 2015-07-26
上传用户：CHINA526
ARM7硬件说明与开发 The ARM7 is a low-power, general purpose 32-bit RISC microprocessor macrocell for use in application or customer-specific integrated circuts (ASICs or CSICs). Its simple, elegant and fully static design is particularly suitable for cost and power-sensitive applications. The ARM7’s small die size makes it ideal for integrating into a larger custom chip that could also contain RAM, ROM, Logic, DSP and other cells.
标签： ARM7 microprocessor low-power macrocell
上传时间： 2013-12-17
上传用户：3到15
MODE_Switch1Processing multi-interrupt request needs to set the priority of these interrupt requests. The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the IRQ flag set doesn t mean the system to execute the interrupt vector. The IRQ flags can be triggered by the events without interrupt enable. Just only any the event occurs and the IRQ will be Logic "1".
标签： multi-interrupt MODE_Switch Processing interrupt
上传时间： 2013-12-04
上传用户：zhichenglu
硬件设计指南(PDF格式)，主要包括：Low Voltage Interfaces；Grounding in Mixed Signal Systems；Digital Isolation Techniques； Power Supply Noise Reduction and Filtering； Dealing with High Speed Logic
上传时间： 2015-08-31
上传用户：阿四AIR
LemonSMS is a component developed in Java that provides a turnkey solution for application developers to incorporate into their Java applications the functionality of sending and processing of incoming SMS messages. LemonSMS acts as a middleware between a Java application and a GSM Modem or Data enabled phone. Because LemonSMS only provides an interface to the added SMS functionality, your application still handles access to data and business Logic tier. With the easy-to-use LemonSMS API, developers can easily utilize SMS functionalities provided by LemonSMS.
标签： application component developed developer
上传时间： 2013-12-29
上传用户：大融融rr
