General Design Specification:1. AC Input Range 180-264Vac, Isolated ac-dc offline, 12LEDS,Output 700mA2. Intelligent wall dimmer detections(Leading-edge dimmer , Trailing-edgedimmer , No-dimmer)3. Multiple dimming control scheme4. Wide dimming range from 1% up to 100%5. No visible flicker6. Resonant control to achieve high efficiency7. High Power Factor, 0.9 without dimmer8. Temperature degrade control to adjust the LED9. Primary-only Sensing eliminates opto-isolator feedback and simplifies design
标签： iw3617
上传时间： 2021-12-03
上传用户：canderile
随着对高功率因数的变换器的需求不断增长，功率因数为1（unity power factor）的电源供给越来越受到欢迎。在计算机或其它一些设备上，电源要求鲁棒性好、可靠、抗干扰能力强。而数字控制正提供了这方面的保障。
上传时间： 2021-12-12
上传用户：wangshoupeng199
基于FPGA设计的相关论文资料大全 84篇用FPGA实现FFT的研究 刘朝晖 韩月秋 摘 要 目的 针对高速数字信号处理的要求，给出了用现场可编程门阵列(FPGA)实现的 快速傅里叶变换(FFT)方案.方法 算法为按时间抽取的基4算法，采用递归结构的块浮点运 算方案，蝶算过程只扩展两个符号位以适应雷达信号处理的特点，乘法器由阵列乘法器实 现.结果 采用流水方式保证系统的速度，使取数据、计算旋转因子、复乘、DFT等操作协 调一致，在计算、通信和存储间取得平衡，避免了瓶颈的出现.结论 实验表明，用FPGA 实现高速数字信号处理的算法是一个可行的方案. 关键词 离散傅里叶变换； 快速傅里叶变换； 块浮点运算； 可编程门阵列 分类号 TP39； TN957.511 Implementation of FFT with FPGA Technology Liu Zhaohui Han Yueqiu (Department of Electronics Engineering, Beijing Institute of Technology, Beijing 100081) Abstract Aim To propose a scheme for implementing FFT with FPGA in accor-dance with the requirement for high speed digital signal processing. Methods The structure of FPGA and requirement of system were considered in the experiment, radix-4 algorithm of DIT and recursive structure were adopted. The group float point arithmetic operation was used in the butterfly and the array multiplier was used to realize multiplication. Results The pipeline pattern was used to ensure the system speed, it made fetching data, calculating twiddle factor, complex multiplication and D
标签： fpga
上传时间： 2022-03-23
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为设计高效率、低损耗的PFC电路,本文基于UCC28019进行电路设计。以UCC28019输出的PWM波形来控制Boost升压斩波为核心电路,使电路中的电容交替地充放电、电感交替的储存和释放能量,最后实现在输入AC20V~24V电压情况下稳定输出DC38V。测试结果表明,系统实现效率为95%左右,电压调整率小于1%,电源功率因数0.99。交流输入电压为19.0-25.8 V时,输出直流电压稳定性较好,电感无明显啸叫且纹波小,具有一定的带负载能力和实用性。In order to design the PFC circuit with high efficiency and low loss,this paper designs the circuit based on UCC28019.The PWM waveform output by UCC28019 is used to control boost chopper as the core circuit,which alternately charges and discharges capacitors,stores and releases energy by inductors,and finally achieves stable output of DC38 V under the input voltage of AC20 V~24 V.The test results show that the system achieves about 95% efficiency,the voltage adjustment rate is less than 1%,the power factor is 0.99,and the AC input voltage is 19.0-25.8 V.The output DC voltage stability is good,the inductance has no obvious whistle and the ripple is small,so it has certain load capacity and practicability.
上传时间： 2022-04-03
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PFC基础知识-PF的定义1功率因数（Power Factor）的定义是指输入有功功率（p）和视在功率（S）的比值；线性电路功率因数可用Cos表示，为正弦电流与正弦电压的相位差；但是由于整流电路中二极管的非线性，导致输入电流为严重的非正弦波形，用cosp已不能表示整流电路的功率因数；常规直接整流电路的滤波电容使输出电压平滑，但却使输入电流变为尖脉冲，并产生高次谐波分量。输入电流波形变，导致功率因数下降，污染电网，甚至造成电子设备损坏。引入功率因数校正是必要的利用功率因数校正技术可A/全跟踪交流输入电压波形，流输入电流波形完使输入电流波形皇纯正弦波，并且与输入电压波形相位，，此时整流器的货载可等效为纯电阻。根据常用功率因数校正方法可分为有源功率因数校正（APFC）技术与无源功率因数校正（PPFC）技术。它置于桥式整流器与滤波用电解电容器之间，实际上是一种DC-DC变换器。无源功率因数校正是利用电感和电容组成滤波器，对输入电容进行移相和整形。有源功率因数校正（APFC：Active Power Factor Correction），在负载即电力电子装置本身的整流器和滤波电容之间增加一个功率变换电路，将整流器的输入电流校正成为与电网电压同相位的正弦波，消除了谐波和无功电流，因而将电网功率因数提高到近似为1.APFC电路常用拓扑：升压式（Boost）降压式（Buck）升/降压式（Buck/Boost）反激式（Fly back）APFC电路形式：单极式 双极式单相PFC 三相PFCBoost变换电路是有源功率因数校正器主回路拓扑的极好选择。优点：输入电流连续，因而产生低的传导噪声和最好的输入电流波形；缺点：需要比输入峰值电压还要高的输出电压。
标签： pfc
上传时间： 2022-05-28
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INTRODUCTION In the past, adding speech recording and playback capability to a product meant using a digital signal processor or a specialized audio chip. Now, using a simplified Adaptive Differential Pulse Code Modulation(ADPCM) algorithm, these audio capabilities can be added to any PICmicro device. This application note will cover the ADPCM compression and decompression algorithms, performance comparison of all PICmicro devices, and an application using a PIC16C72 micro-controller.DEFINITION OF TERMS step size -value of the step used for quantization of ana-log signals and inverse quantization of a number of steps.quantization -the digital form of an analog input signal is represented by a finite number of steps.adaptive quantization -the step size of a quantizer is dramatically changed with time in order to adapt to a changing input signal.inverse quantizer -a finite number of steps is converted into a digital representation of an analog signal.
上传时间： 2022-06-20
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VITA 46 Highlights Retain standard 6U and 3U Form-Factors Height, depth, pitch, front panel arrangements, conduction-cooled interfaces, etc.Support standard-length PMC and XMC modules· Support high-speed serial fabric on the backplane Tyco MultiGig RT2,7-row connector· Support VME and PCI interfaces for legacy compatibility· Provision for optical connectors as option· Support improved logistics Provide support for Line Replaceable Module(LRM) applications with ESD-protected connector Alignment and keying blocks
标签： vita46
上传时间： 2022-07-25
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