i2c code for the verilog
上传时间： 2013-09-04
上传用户：DXM35
Cadence guide for verilog
上传时间： 2013-09-04
上传用户：123454
著名的游戏开发库Allegro4.2.0 for DELPHI.rar
上传时间： 2013-09-06
上传用户：海陆空653
JTAG programmator for DSP TI
标签： programmator JTAG DSP for
上传时间： 2013-09-09
上传用户：541657925
ATmega128 circuit for ORCAD
上传时间： 2013-09-10
上传用户：xuanjie
Altium Designer 6 Training for FPGA,Software andSystemsDevelopmentEmbedded Intelligence Training
标签： Designer Training Altium FPGA
上传时间： 2013-09-13
上传用户：回电话#
Protel for Windows v1.5 软件为例来介绍一下高频电路布线时. Protel 软件 能提供的一些特殊对策 ...Protel for WindowsV1.5 能提供16 个铜线层和4 个. 电源层 合理选择层数能大幅度降低印板尺寸能充分利用中间层来设置屏蔽 ...\r\n
上传时间： 2013-09-20
上传用户：子虚乌有
Proteus examples for fun!
上传时间： 2013-09-25
上传用户：tianyi996
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-22
上传用户：han_zh
本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.
标签： Synthesis Machine Coding Styles
上传时间： 2013-10-15
上传用户：dancnc
