如同今天的许多通用单片机(MCU)已经把USB、CAN和以太网作为标准外设集成在芯片内部一样，越来越多的无线网络芯片和无线网络解决方案也在向集成SoC 方向发展，比如第一代产品，Nordic公司nRF905，Chipcon公司cc1010 他们集成了8051兼容的单片机.这些无线单片机适合一般的点对点和点对多点的私有网络应用，如单一产品的遥控器和抄表装置等。无线通讯技术给智能装置的互连互通提供了便捷的途径，工业无线网络作为面向工业和家庭自动化的网络技术也正在向着智能，标准和节能方向发展。 目前在工业控制和消费电子领域使用的无线网络技术有ZigBee、无线局域网(Wi-Fi)、蓝牙(Blutooth)、GPRS通用分组无线业务、 ISM、IrDA等， 未来还能有3G、超宽频(UWB)、无线USB、Wimax等。 当然还有大量的私有和专用无线网络在工业控制和消费电子装置中使用，其中ZigBee、GPRS是在目前在国内工业控制中讨论和使用比较多的两种，蓝牙和无线局域网是在消费电子产品如手机、耳机、打印机、照相机和家庭中小企业网络中广泛使用的无线协议(个别工业产品也有应用，如无线视频监控和汽车音响系统)，当然私有无线网络技术和产品在工业也有很多的应用。 ZigBee是一个低功耗、短距离和低速的无线网络技术，工作在2.4GHz国际免执照的频率，在IEEE标准上它和无线局域网、蓝牙同属802家族中的无线个人区域网络， ZigBee是有两部分组成，物理和链路层符合IEEE802.15.4， 网络和应用层符合ZigBee联盟的规范。ZigBee联盟是在2002年成立的非盈利组织，有包括TI、霍尼威尔、华为在内两百多家成员， ZigBee联盟致力推广兼容802.15.4和ZigBee协议的平台， 制定网络层和应用架构的公共规范，希望在楼宇自动化、居家控制、家用电器、工业自动控制和电脑外设等多方面普及ZigBee标准。 GPRS是在现有的GSM 网络发展出来的分组数据承载业务，它工作在标准的GSM频率，由于是一个分组交换系统，它适合工业上的突发，少量的数据传输，还因为GSM网络覆盖广泛，永远在线的特点，GPRS特点适合工业控制中的远程监控和测量系统。在工业控制应用中GPRS 芯片一般是以无线数传模块形式出现的，它通过RS232全双工接口和单片机连接，软件上这些模块都内置了GPRS，PPP和TCP/IP协议，单片机侧通过AT指令集向模块发出测试，连接和数据收发指令，GPRS模块通过中国移动cmnet进入互联网和其他终端或者服务器通讯。目前市场常见的模块有西门子G24TC45、TC35i，飞思卡尔G24，索爱GR47/48， 还有Wavecom 的集成了ARM9核的GPRS SoC模块WMP50/100。GPRS模块有区分自带TCP/IP协议和不带协议两种，一般来讲，如果是单片机侧有嵌入式操作系统和TCP/IP协议支持的话或者应用的要求只是收发短信和语音功能的话，可以选择不带协议的模块。 先进的SoC技术正在无线应用领域发挥重要的作用。德州仪器收购了Chipcon公司以后发布的CC2430 是市场上首款SoC的ZigBee单片机， 见图1，它把协议栈z-stack集成在芯片内部的闪存里面， 具有稳定可靠的CC2420收发器，增强性的8051内核，8KRAM，外设有I/O 口，ADC，SPI，UART 和AES128 安全协处理器，三个版本分别是32/64/128K的闪存，以128K为例，扣除基本z-stack协议还有3/4的空间留给应用代码，即使完整的ZigBee协议，还有近1/2的空间留给应用代码，这样的无线单片机除了处理通讯协议外，还可以完成一些监控和显示任务。这样无线单片机都支持通过SPI或者UART与通用单片机或者嵌入式CPU结合。 2008年4月发表CC2480新一代单片ZibBee认证处理器就展示出和TI MSP430 通用的低功耗单片机结合的例子。图1 CC2430应用电路 工业控制领域的另一个芯片巨头——飞思卡尔的单片ZigBee处理器MC1321X的方案也非常类似，集成了HC08单片机核心， 16/32/64K 闪存，外设有GPIO， I2C和ADC， 软件是Beestack 协议，只是最多4K RAM 对于更多的任务显得小了些。但是凭借32位单片机Coldfire和系统软件方面经验和优势， 飞思卡尔在满足用户应用的弹性需求方面作的更有特色，它率先能够提供从低-中-高各个层面的解决方案，见图2。
上传时间： 2013-11-02
上传用户：momofiona
针对使用硬件描述语言进行设计存在的问题，提出一种基于FPGA并采用DSP Builder作为设计工具的数字信号处理器设计方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ设计流程，设计了一个12阶FIR 低通数字滤波器，通过Quartus 时序仿真及嵌入式逻辑分析仪SignalTapⅡ硬件测试对设计进行了验证。结果表明，所设计的FIR 滤波器功能正确，性能良好。 Abstract: Aiming at the problems in designing DSP using HDL，a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
上传时间： 2013-11-17
上传用户：lo25643
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing orders, that information being relied onis current and complete. All products are sold subject to the terms and conditions of sale suppliedat the time of order acknowledgement, including those pertaining to warranty, patentinfringement, and limitation of liability
上传时间： 2013-12-26
上传用户：凌云御清风
There has long been a need for portable ultrasoundsystems that have good resolution at affordable costpoints. Portable systems enable healthcare providersto use ultrasound in remote locations such asdisaster zones, developing regions, and battlefields,where it was not previously practical to do so.
上传时间： 2013-10-26
上传用户：liulinshan2010
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上传时间： 2013-10-22
上传用户：ztj182002
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
上传时间： 2014-12-28
上传用户：康郎
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
上传时间： 2014-01-13
上传用户：竺羽翎2222
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上传时间： 2013-10-22
上传用户：liu999666
The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.
标签： 通信
上传时间： 2013-10-31
上传用户：liuxinyu2016
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
标签： CPLD
上传时间： 2013-10-22
上传用户：李哈哈哈
