Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply considerations that an engineer must think through whendesigning a power supply for an FPGA.
上传时间： 2013-11-10
上传用户：iswlkje
多远程二极管温度传感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.
标签： Considerat Design 远程 二极管
上传时间： 2014-12-21
上传用户：ljd123456
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上传时间： 2013-10-24
上传用户：s蓝莓汁
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
上传时间： 2014-12-30
上传用户：aysyzxzm
when I started writing the first edition of RF Power Amplifiers for Wireless Communications,some time back in 1997, it seemed that I was roaming a largely uninhabitedlandscape. For reasons still not clear to me there were few, if any, otherbooks dedicated to the subject of RF power amplifiers. Right at the same time, however,hundreds of engineers were being assigned projects to design PAs for wirelesscommunications products. It was not, therefore, especially difficult to be successfulwith a book that was fortuitously at the right place and the right time.
标签： Communications Amplifiers Wireless Edition
上传时间： 2013-11-12
上传用户：YYRR
Abstract: High-speed and low-speed data converters serve critical functions in modern broadband mobile radios. This application note outlines how todetermine high-speed data converter performance requirements in baseband sampling radio architectures. Also, system partition strategies andadvantages are outlined when considering a high-speed analog front-end (AFE) solution.
上传时间： 2013-11-02
上传用户：jjj0202
Abstract: when people want portable music, they usually rely on battery-powered audio devices. With a bit of engineeringblood (or curiosity) running in your veins, it is not difficult to build a wireless Bluetooth® stereo audio system that can becontrolled with any device that has a Bluetooth connection and a music player
上传时间： 2013-10-09
上传用户：天空说我在
ZigBee技术是一种应用于短距离范围内，低传输数据速率下的各种电子设备之间的无线通信技术。ZigBee名字来源于蜂群使用的赖以生存和发展的通信方式，蜜蜂通过跳ZigZag形状的舞蹈来通知发现的新食物源的位置、距离和方向等信息，以此作为新一代无线通讯技术的名称。ZigBee过去又称为“HomeRF Lite”、“RF-EasyLink”或“FireFly”无线电技术，目前统一称为ZigBee技术。 2、ZigBee技术的特点 自从马可尼发明无线电以来，无线通信技术一直向着不断提高数据速率和传输距离的方向发展。例如：广域网范围内的第三代移动通信网络（3G）目的在于提供多媒体无线服务，局域网范围内的标准从IEEE802.11的1Mbit/s到IEEE802.11g的54Mbit/s的数据速率。而当前得到广泛研究的ZigBee技术则致力于提供一种廉价的固定、便携或者移动设备使用的极低复杂度、成本和功耗的低速率无线通信技术。这种无线通信技术具有如下特点： 功耗低：工作模式情况下，ZigBee技术传输速率低，传输数据量很小，因此信号的收发时间很短，其次在非工作模式时，ZigBee节点处于休眠模式。设备搜索时延一般为30ms，休眠激活时延为15ms，活动设备信道接入时延为15ms。由于工作时间较短、收发信息功耗较低且采用了休眠模式，使得ZigBee节点非常省电，ZigBee节点的电池工作时间可以长达6个月到2年左右。同时，由于电池时间取决于很多因素，例如：电池种类、容量和应用场合，ZigBee技术在协议上对电池使用也作了优化。对于典型应用，碱性电池可以使用数年，对于某些工作时间和总时间（工作时间+休眠时间）之比小于1%的情况，电池的寿命甚至可以超过10年。 数据传输可靠：ZigBee的媒体接入控制层（MAC层）采用talk-when-ready的碰撞避免机制。在这种完全确认的数据传输机制下，当有数据传送需求时则立刻传送，发送的每个数据包都必须等待接收方的确认信息，并进行确认信息回复，若没有得到确认信息的回复就表示发生了碰撞，将再传一次，采用这种方法可以提高系统信息传输的可靠性。同时为需要固定带宽的通信业务预留了专用时隙，避免了发送数据时的竞争和冲突。同时ZigBee针对时延敏感的应用做了优化，通信时延和休眠状态激活的时延都非常短。 网络容量大：ZigBee低速率、低功耗和短距离传输的特点使它非常适宜支持简单器件。ZigBee定义了两种器件：全功能器件（FFD）和简化功能器件（RFD）。对全功能器件，要求它支持所有的49个基本参数。而对简化功能器件，在最小配置时只要求它支持38个基本参数。一个全功能器件可以与简化功能器件和其他全功能器件通话，可以按3种方式工作，分别为：个域网协调器、协调器或器件。而简化功能器件只能与全功能器件通话，仅用于非常简单的应用。一个ZigBee的网络最多包括有255个ZigBee网路节点，其中一个是主控（Master）设备，其余则是从属（Slave）设备。若是通过网络协调器（Network Coordinator），整个网络最多可以支持超过64000个ZigBee网路节点，再加上各个Network Coordinator可互相连接，整个ZigBee网络节点的数目将十分可观。 兼容性：ZigBee技术与现有的控制网络标准无缝集成。通过网络协调器（Coordinator）自动建立网络，采用载波侦听/冲突检测（CSMA-CA）方式进行信道接入。为了可靠传递，还提供全握手协议。
标签： zigbee
上传时间： 2013-11-24
上传用户：siguazgb
This is the second half of our Transistor Circuits e-book. It contains a further 100 circuits, with many of them containing one or more Integrated Circuits (ICs).It's amazing what you can do with transistors but when Integrated Circuits came along, the whole field of electronics exploded.
上传时间： 2013-11-08
上传用户：603100257
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. when the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上传时间： 2013-11-11
上传用户：gundamwzc
