·[ARRL.无线电通讯手册].The.Arrl.Handbook.For.Radio.Communications.-.2005Introduction to the CD-ROM EditionThe ARRL Handbook For Radio CommunicationsThis Version 9.0 of the ARRL Handbook CD-ROM contains the co
标签: Communications Handbook Radio ARRL
上传时间: 2013-04-24
上传用户:SimonQQ
VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.
上传时间: 2013-08-05
上传用户:wwwe
本文简单讨论并总结了VHDL、Verilog,System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
标签: Verilog verilog System VHDL
上传时间: 2013-10-16
上传用户:牛布牛
介绍基于VHDL的微型打印机控制器的设计。论述了微型打印机的基本原理,以及实现控制器的VHDL语言设计。打印机的数据来自系统中的存储模块,根据需要控制打印。该微型打印机控制器可取代传统的微型打印机,且抗干扰性好,可靠性高,具有较强的移植性,稍加改动就可应用于不同场合。 Abstract: This paper introduced the design method of micro printer controller based on VHDL.The basic principles of microprinter is explained,as well as the realization of the controller by VHDL language.The printer data is from the system memory modules,can control printer.The design of microprinter controller has antigood and high reliability,it can replace the traditional printer.The controller has very good portability,and need little modify that can use in different situation.
上传时间: 2013-11-03
上传用户:dudu1210004
ZBT SRAM控制器参考设计,xilinx提供VHDL代码 Description: Contains the following files readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf Platform: All Installation/Use: Use 'unzip' on the .zip file and 'gunzip' followed by 'tar -xvf' on the .tar.gz file.
上传时间: 2013-11-24
上传用户:31633073
USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 2 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
上传时间: 2013-10-12
上传用户:windgate
ref-sdr-sdram-vhdl代码 SDR SDRAM Controller v1.1 readme.txt This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1. The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture. Last updated September, 2002 Copyright ?2002 Altera Corporation. All rights reserved.
上传时间: 2013-11-13
上传用户:takako_yang
UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
上传时间: 2013-11-07
上传用户:jasson5678
This introduction covers the fundamentals of VHDL as applied to Complex ProgrammableLogic Devices (CPLDs). Specifically included are those design practices that translate soundlyto CPLDs, permitting designers to use the best features of this powerful language to extractoptimum performance for CPLD designs.
上传时间: 2013-11-21
上传用户:gtf1207
本文简单讨论并总结了VHDL、Verilog,System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
标签: Verilog verilog System VHDL
上传时间: 2014-03-03
上传用户:zhtzht