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steady-State

  • In engineering, compensation is planning for side effects or other unintended issues in a design. Th

    In engineering, compensation is planning for side effects or other unintended issues in a design. The design of an invention can itself also be to compensate for some other existing issue or exception. One example is in a voltage-controlled crystal oscillator (VCXO), which is normally affected not only by voltage, but to a lesser extent by temperature. A temperature-compensated version (a TCVCXO) is designed so that heat buildup within the enclosure of a transmitter or other such device will not alter the piezoelectric effect, thereby causing frequency drift. Another example is motion compensation on digital cameras and video cameras, which keep a picture steady and not blurry.

    标签: compensation engineering unintended planning

    上传时间: 2013-12-11

    上传用户:z754970244

  • This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with inte

    This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The fi rst program uses the programmed I/O approach and the second program uses interrupts.

    标签: with communicate how tutorial

    上传时间: 2013-12-13

    上传用户:熊少锋

  • The objective is to set up SPI communication between VTI Technologies digital pressure sensor comp

    The objective is to set up SPI communication between VTI Technologies digital pressure sensor component and an MCU of an application device ATMEGA16L. In this code example: ?The MCU is configured ?SCP1000-D01 is initialized and configured ?The high resolution measurement mode is activated ?Temperature and pressure information is read always when the DRDY pin is in high state Please refer to the document "SCP1000 Product Family Specification 8260800" for further information on SCP1000 register addressing and SPI communication. This document applies to the SCP1000-D01.

    标签: communication Technologies objective pressure

    上传时间: 2017-06-17

    上传用户:youmo81

  • The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. I

    The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. In this paper, based on the FPGA platform, The theoretical analysis, characteristics, simulation and design consideration are given. The methods to implement the digital DC/DC Converters have been researched. The function module, state machine of digital DC/DC controller and high resolution DPWM with Sigma- Delta dither has been introduced. They are verified by experiments on a 20 W, 300 KHz non-isolated synchronous buck converters.

    标签: Converters controller optimized Digital

    上传时间: 2013-12-31

    上传用户:tzl1975

  • In this paper, a new method is introduced to implement chaotic generators based on the Henon map and

    In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this method is to increase the frequency of the chaotic generators. The new method is based on the MATLAB® Software, Xilinx System Generator, Xilinx Alliance tools and Synplicity Synplify.

    标签: introduced generators implement chaotic

    上传时间: 2017-07-24

    上传用户:qq521

  • RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the

    RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.

    标签: using fundamental the RS_latch

    上传时间: 2017-07-30

    上传用户:努力努力再努力

  • The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at

    The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at the same time there are many open issues related to the general security of FPGAs. This contribution attempts to provide a state-of-the-art description of this topic. First, the advantages of reconfigurable hardware for cryptographic applications are discussed from a systems perspective. Second, potential security problems of FPGAs are described in detail, followed by a proposal of a some countermeasure. Third, a list of open research problems is provided. Even though there have been many contributions dealing with the algorithmic aspects of cryptographic schemes implemented on FPGAs, this contribution appears to be the first comprehensive treatment of system and security aspects.

    标签: cryptographic applications attractive for

    上传时间: 2013-12-07

    上传用户:zhuimenghuadie

  • AVR single-chip developed by a very low threshold, as long as the computer will be able to study the

    AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."

    标签: single-chip developed threshold the

    上传时间: 2017-09-12

    上传用户:shinesyh

  • AVR single-chip developed by a very low threshold, as long as the computer will be able to study the

    AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."

    标签: single-chip developed threshold the

    上传时间: 2013-12-09

    上传用户:invtnewer

  • 文件Java排课系统的报告

    My JSP 'TeacherMain.jsp' starting page var $=function(id) { return document.getElementById(id); } function show_menu(num){ for(i=0;i

    标签: C++

    上传时间: 2015-07-03

    上传用户:xiyuzhu