《单片机与嵌入式系统应用》论文--嵌入式GSM短信息接口的软硬件设计，文章给出一个小型的嵌入式SMS中/英文短信信息接口的设计，并详细讨论PDU模式的短信息格式和中文短信息软件解码的设计。
上传时间： 2013-07-12
上传用户：lanwei
·详细说明：双音多频（DTMF）信号发生器的使用源程序，vc 编写，与《双音多频（DTMF）接收器的使用源程序》联合用- The double sound multi- frequencies (DTMF) the signal generating device use source program, the vc compilation, (DTMF) Receiver Use Source p
上传时间： 2013-07-23
上传用户：tianjinfan
SIM900A采用工业标准接口，工作频率为GSM/GPRS 850/900/1800/1900MHz，可以低功耗实现语音、SMS、数据和传真信息的传输。
上传时间： 2013-05-19
上传用户：龙飞艇
Abstract: The MAX3108 is a complete high-performance universal asynchronous receiver-transmitter (UART) in a tiny 2.1mm ×
标签： Programming Rates Baud 3108
上传时间： 2014-12-23
上传用户：清风冷雨
The LT®6552 is a specialized dual-differencing 75MHzoperational amplifier ideal for rejecting common modenoise as a video line receiver. The input pairs are designedto operate with equal but opposite large-signal differencesand provide exceptional high frequency commonmode rejection (CMRR of 65dB at 10MHz), therebyforming an extremely versatile gain block structure thatminimizes component count in most situations. The dualinput pairs are free to take on independent common modelevels, while the two voltage differentials are summedinternally to form a net input signal.
上传时间： 2014-12-23
上传用户：13691535575
Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.
上传时间： 2014-12-05
上传用户：cylnpy
Avalanche photo diode (APD) receiver modules arewidely used in fi ber optic communication systems. AnAPD module contains the APD and a signal conditioningamplifi er, but is not completely self contained. It stillrequires signifi cant support circuitry including a highvoltage, low noise power supply and a precision currentmonitor to indicate the signal strength. The challenge issqueezing this support circuitry into applications withlimited board space. The LT®3482 addresses this challengeby integrating a monolithic DC/DC step-up converter andan accurate current monitor. The LT3482 can supportup to a 90V APD bias voltage, and the current monitorprovides better than 10% accuracy over four decades ofdynamic range (250nA to 2.5mA).
上传时间： 2014-01-18
上传用户：wenyuoo
介绍一种基于C8051F060单片机和NAND Flash的数据采集存储系统，该系统可实现3路信号采样，每路采样率为5KS/s,通过异步串行通信接口实现数据传输。并详细说明系统的软件设计。 Abstract: An acquisition and storage system based on C8051F060and NAND Flash is designed in this paper.The system is used to sample three-channel of signal,5KSPS each channel,and can upload data to test bench through UART（Universal Asynchronous Receiver/Transmitter）.The software design is discussed in detail.
上传时间： 2013-10-12
上传用户：Jesse_嘉伟
在嵌入式系统中，嵌入式CPU往往要通过各种串行数据总线与“外界”进行通信。在应用中，异步的串行数据通信用得较多，而通用异步收发器UART（Universal Asynchronous Receiver Transmitter）在其中扮演着重要角色：完成数据的串并转换，即把并行数据按照通信波特率转化为通信协议中规定的串行数据流，也可从串行数据流中取出有用数据转变为并行数据。而UART与CPU接口简单，CPU只需通过执行读写操作即可完成收发数据，从而完成与外界的通信。有许多现成的芯片可以实现UART的功能，如常用的Intel8250/8251接口芯片就可以作为RS232、RS422串口的UART控制芯片。
上传时间： 2013-11-25
上传用户：www240697738
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上传时间： 2013-10-13
上传用户：ytulpx
