iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
标签： VHDL c_control vhd control
上传时间： 2016-10-30
上传用户：woshiayin
gps design guide,for low level study
上传时间： 2016-10-30
上传用户：liglechongchong
low level hook to record mouse and keyobard events and play back
标签： and keyobard events record
上传时间： 2016-11-15
上传用户：天涯
It about c++ senior traing course. it very usefull for someone who want to enhance c++ programing. it comes frome hua wei company s traning course
标签： programing enhance someone usefull
上传时间： 2016-11-21
上传用户：杜莹12345
Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
标签： Lab Shifter Verilog Design
上传时间： 2016-12-01
上传用户：cylnpy
ADPLL of high level phase locked loop
上传时间： 2016-12-04
上传用户：wpwpwlxwlx
MATLAB is a high-level language for technical computing which is often used by engineers to help them design systems or analyse a system’s behaviour.
标签： high-level computing engineers technical
上传时间： 2014-01-11
上传用户：txfyddz
Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理教材。
标签： Processing eBook-DDU Digital LabVIEW
上传时间： 2014-01-22
上传用户：gundan
Debugging with GDB, The GNU Source-Level Debugger Ninth Exlition,for GDB version6.6
标签： Source-Level Debugging GDB Debugger
上传时间： 2016-12-16
上传用户：ynsnjs
This file (the project file) contains information at the project level and is used to build a single project or subproject. Other users can share the project (.dsp) file, but they
标签： project file information the
上传时间： 2013-12-18
上传用户：cainaifa
