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  • CAT28LV64-64Kb CMOS并行EEPROM数据手

    The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.

    标签: EEPROM 64 CMOS CAT

    上传时间: 2013-11-16

    上传用户:浩子GG

  • PCA9544A 4channel I2C multiple

    The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.

    标签: 4channel multiple 9544A 9544

    上传时间: 2014-12-28

    上传用户:潜水的三贡

  • 基于MCGS的凌阳单片机驱动程序的设计

    本文简单介绍了MCGS 组态软件和SPCE061A 单片机的特点,即北京昆仑通态自动化软件科技有限公司的工控组态软件MCGS(Monitor and Control Generated System )和台湾凌阳科技推出的16 位微控制器SPCE061A,重点介绍了如何一步步开发SPCE061A 单片机的驱动程序,并简单介绍了下位机程序的设计,最后给出了测试情况。计算机技术的飞速发展为工业自动化开辟了广阔的发展空间,人们可以快捷地开发和组建高效的控制系统。笔者设计的液体点滴监控模型,可以对液体点滴情况实现远程监控和现场监控,终端和上位机均可人工设定所需的液体点滴速度并动态显示。在这方面,MCGS 工控组态软件提供了强有力的支持,它是一套Windows 环境下快速构造和生成上位机监控系统的组态软件系统,可快速构造和生成数据采集、报警处理、流程控制、动画显示、报表输出等界面,实现各种工程曲线的绘制、报表输出、远程通信等功能 [1]。MCGS 作为一种方便有效的通用工控软件,它提供了国内外各种常用的工控设备的驱动程序。但在实际应用中,因为所用设备的特殊性,允许用户根据需要来定制设备驱动程序。MCGS 用Active DLL 构件实现设备驱动程序,通过规范的OLE 接口挂接到MCGS 中,使其构成一个整体。鉴于Visual Basic 语言的通用性和简单性,使用VB 来开发单片机驱动,MCGS 的实现方法和原理与标准的Active DLL 完全一致,但MCGS 规定了一套接口规范,只有遵守这些接口规范的Active DLL 才能用作MCGS 的设备驱动构件。利用具有语音和 DSP 功能的SPCE061A 单片机作为液体点滴监控模型的核心控制器,SPCE061A 是台湾凌阳科技推出的16 位微控制器,提供了丰富的软、硬件资源,开发灵活方便。除此之外SPCE061A 的最高时钟频率可达到49MHz,具有运算速度高的优势,这为语音的录制和播放提供了条件[4]。

    标签: MCGS 凌阳单片机 驱动程序

    上传时间: 2013-12-19

    上传用户:leesuper

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    标签: Signal Input Fall Rise

    上传时间: 2013-10-23

    上传用户:copu

  • 介绍C16x系列微控制器的输入信号升降时序图及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    标签: C16x 微控制器 输入信号 时序图

    上传时间: 2014-04-02

    上传用户:han_zh

  • 基于DSP与FPGA的多视频通道的切换控制

    为了扩大监控范围,提高资源利用率,降低系统成本,提出了一种多通道视频切换的解决方案。首先从视频信号分离出行场信号,然后根据行场信号由DSP和FPGA产生控制信号,控制多路视频通道之间的切换,从而实现让一个视频处理器同时监控不同场景。实验结果表明,该方案可以在视频监控告警系统中稳定、可靠地实现视频通道的切换。 Abstract:  To expand the scope of monitoring, improve resource utilization, reduce system cost, a multiple video channels signal switching method is pointed out in this paper. First, horizontal sync signal and field sync signal from the video signal are separated, then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus, it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably, and is applied in the video monitoring warning system successfully.

    标签: FPGA DSP 视频通道 切换控制

    上传时间: 2013-11-09

    上传用户:不懂夜的黑

  • 《器件封装用户向导》赛灵思产品封装资料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    标签: 封装 器件 用户 赛灵思

    上传时间: 2013-10-22

    上传用户:ztj182002

  • 基于(英蓓特)STM32V100的看门狗程序

    This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).

    标签: V100 STM 100 32V

    上传时间: 2013-11-11

    上传用户:gundamwzc

  • 《器件封装用户向导》赛灵思产品封装资料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    标签: 封装 器件 用户 赛灵思

    上传时间: 2013-11-21

    上传用户:不懂夜的黑

  • PCB被动组件的隐藏特性解析

    PCB 被动组件的隐藏特性解析 传统上,EMC一直被视为「黑色魔术(black magic)」。其实,EMC是可以藉由数学公式来理解的。不过,纵使有数学分析方法可以利用,但那些数学方程式对实际的EMC电路设计而言,仍然太过复杂了。幸运的是,在大多数的实务工作中,工程师并不需要完全理解那些复杂的数学公式和存在于EMC规范中的学理依据,只要藉由简单的数学模型,就能够明白要如何达到EMC的要求。本文藉由简单的数学公式和电磁理论,来说明在印刷电路板(PCB)上被动组件(passivecomponent)的隐藏行为和特性,这些都是工程师想让所设计的电子产品通过EMC标准时,事先所必须具备的基本知识。导线和PCB走线导线(wire)、走线(trace)、固定架……等看似不起眼的组件,却经常成为射频能量的最佳发射器(亦即,EMI的来源)。每一种组件都具有电感,这包含硅芯片的焊线(bond wire)、以及电阻、电容、电感的接脚。每根导线或走线都包含有隐藏的寄生电容和电感。这些寄生性组件会影响导线的阻抗大小,而且对频率很敏感。依据LC 的值(决定自共振频率)和PCB走线的长度,在某组件和PCB走线之间,可以产生自共振(self-resonance),因此,形成一根有效率的辐射天线。在低频时,导线大致上只具有电阻的特性。但在高频时,导线就具有电感的特性。因为变成高频后,会造成阻抗大小的变化,进而改变导线或PCB 走线与接地之间的EMC 设计,这时必需使用接地面(ground plane)和接地网格(ground grid)。导线和PCB 走线的最主要差别只在于,导线是圆形的,走线是长方形的。导线或走线的阻抗包含电阻R和感抗XL = 2πfL,在高频时,此阻抗定义为Z = R + j XL j2πfL,没有容抗Xc = 1/2πfC存在。频率高于100 kHz以上时,感抗大于电阻,此时导线或走线不再是低电阻的连接线,而是电感。一般而言,在音频以上工作的导线或走线应该视为电感,不能再看成电阻,而且可以是射频天线。

    标签: PCB 被动组件

    上传时间: 2013-11-16

    上传用户:极客