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sOFtware

sOFtware即软件。凡是能够在终端运行的都可以归为软件,软件的种类繁多。
  • 基于ADSP-BF561 的数字摄像系统设计

    基于ADSP-BF561的数字摄像系统设计Design of Digital Video Camera System Based on Digital Signal ProcessorADSP-BF561(浙江大学 信息与通信工程研究所,浙江 杭州 310027) 马海杰, 刘云海摘要:介绍了基于ADI双核的数字信号处理芯片ADSP-BF561 的数字摄像系统实现方案。系统包括硬件和软件两部分,硬件主要有ADSP-BF561及其外围电路、音视频模数/数模转换、CF卡/微硬盘接口等部分。软件主要有操作系统及音视频编解码算法等部分。关键词:ADSP-BF561 ;数字摄像机;微硬盘;MPEG-4;A/D;D/A中图分类号:TN948.41文献标识码:AAbstract: An implementation of digital video camera system based on ADI dual core digital signal processor ADSP-BF561 is introduced. The system can be divided into two parts——hardware and sOFtware design. The hardware design includes ADSP-BF561 and perpheral apparatus, A/D,D/A, CF card or Microdrive and so on. The sOFtware includes operating system , audio and video coding algorithm.Key words: ADSP-BF561; digital video camera; microdrive; MPEG-4;A/D;D/A

    标签: ADSP-BF 561 数字摄像 系统设计

    上传时间: 2013-11-10

    上传用户:yl1140vista

  • 51单片机读写u盘(含源程序和原理图)

    附件有51单片机加上sl811读写U盘的源程序和原理图 /*--------------------------------------------------------------------------AT89X52.H Header file for the low voltage Flash Atmel AT89C52 and AT89LV52.Copyright (c) 1995-1996 Keil sOFtware, Inc.  All rights reserved.--------------------------------------------------------------------------*/ #ifndef AT89X52_HEADER_FILE#define AT89X52_HEADER_FILE 1 /*------------------------------------------------Byte Registers------------------------------------------------*/sfr P0      = 0x80;sfr SP      = 0x81;sfr DPL     = 0x82;sfr DPH     = 0x83;sfr PCON    = 0x87;sfr TCON    = 0x88;sfr TMOD    = 0x89;sfr TL0     = 0x8A;sfr TL1     = 0x8B;sfr TH0     = 0x8C;sfr TH1     = 0x8D;sfr P1      = 0x90;sfr SCON    = 0x98;sfr SBUF    = 0x99;sfr P2      = 0xA0;sfr IE      = 0xA8;sfr P3      = 0xB0;sfr IP      = 0xB8;sfr T2CON   = 0xC8;sfr T2MOD   = 0xC9;sfr RCAP2L  = 0xCA;sfr RCAP2H  = 0xCB;sfr TL2     = 0xCC;sfr TH2     = 0xCD;sfr PSW     = 0xD0;sfr ACC     = 0xE0;sfr B       = 0xF0;

    标签: 51单片机 读写 源程序 原理图

    上传时间: 2014-01-05

    上传用户:lnnn30

  • 基于DSP的ATV-ATT中控系统设计

    设计一种应用于某全地形ATV车载武器装置中的中控系统,该系统设计是以TMS320F2812型DSP为核心,采用模块化设计思想,对其硬件部分进行系统设计,能够完成对武器装置高低、回转方向的运动控制,实现静止或行进状态中对目标物的测距,自动瞄准以及按既定发射模式发射弹丸和各项安全性能检测等功能。通过编制相应的软件,对其进行系统调试,验证了该设计运行稳定。 Abstract:  A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core, uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment, rotation direction, to achieve a state of static or moving objects on the target ranging, auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate sOFtware and to carry out system testing to verify the stability of this design and operation.

    标签: ATV-ATT DSP 中控系统

    上传时间: 2013-11-02

    上传用户:jshailingzzh

  • 基于DSP的车载雷达测速系统设计

    针对运行中火车测速运用多普勒效应采用DSP 设计雷达测速系统并阐述了其基本设计思想与工作原理给出系统硬件软件设计结构和原理图改善了原有光电测速精度提高了系统工作稳定性和可靠性经实验证明DSP 采集板工作稳定测速效果好关键词DSP; 雷达测速; 多普勒效应 On Board DSP-Based Radar Speed Measurement System TANG Wei, SUN Zhi-fang, CHEN Quan (Dept.of computer Science,Yangtze University,Jingzhou 434023,China)Abstract: This paper presents a DSP-based train speed measurement by using Doppler radar. The structure of the system is introduced.The hardware and sOFtware are also discussed.Key words: DSP; rader speed measurement; doppler principle

    标签: DSP 车载 系统设计 雷达测速

    上传时间: 2013-10-27

    上传用户:003030

  • MATLAB与PSpice数据接口技术

    摘 要 瞬态仿真领域的许多工作需要获得可视化数据, 仿真电路不能将输出参数绘制成图形时研究工作将受到很大影响. 而权威电路仿真软件PSpice 在这个方面不尽如人意. 本文提出了一种有效的解决办法: 通过MATLAB 编程搭建一个PSpice 与MATLAB 的数据接口,使PSpice输出数据文件可以导入到MATLAB中绘制图形. 这令我们能够很方便地获得数据的规律以有效地分析仿真结果, 这项技术对于教学和工程实践都有比较实际的帮助.关键词: 瞬态仿真 仿真程序 PSpice MATLAB 可视化数据The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice sOFtware sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科学研究和工程应用常需要进行电路仿真 PSpice可进行直流 交流 瞬态等基本电路特性分析 也可进行蒙托卡诺 MC 统计分析 最坏情况 Wcase 分析 优化设计等复杂电路特性分析 它是国际上仿真电路的权威软件 而MATLAB的主要特点有 高效方便的矩阵和数组运算 编程效率高 结构化面向对象 方便的绘图功能 用户使用方便 工具箱功能强大 两者各有着重点 两种软件结合应用 对研究工作有很重要的意义香港理工大学Y. S. LEE 等人首先将PSpice和MATLAB结合 开发了电力电子电路优化用的CAD 程序MATSPICE[6] 将两者相结合的关键在于 如何用MATLAB 获取PSpice的仿真数据 对此参考文献 6 里没有详细叙述 本文着重说明用MATLAB 读取PSpice仿真数据的具体方法本论文利用MATLAB对PSpice仿真出的数据处理绘制出后者无法得到或是效果不好的仿真图形 下面就两者结合使用的例子 进行具体说明

    标签: MATLAB PSpice 数据 接口技术

    上传时间: 2013-10-20

    上传用户:wuchunzhong

  • xapp069 - 使用XC9500 JTAG边界扫描接口

    This application note explains the XC9500™/XL/XV Boundary Scan interface anddemonstrates the sOFtware available for programming and testing XC9500/XL/XV CPLDs. Anappendix summarizes the iMPACT sOFtware operations and provides an overview of theadditional operations supported by XC9500/XL/XV CPLDs for in-system programming.

    标签: xapp 9500 JTAG 069

    上传时间: 2013-11-15

    上传用户:fengweihao158@163.com

  • XAPP424 - 嵌入式JTAG ACE播放器

    This application note contains a reference design consisting of HDL IP and Xilinx AdvancedConfiguration Environment (ACE) sOFtware utilities that give designers great flexibility increating in-system programming (ISP) solutions. In-system programming support allowsdesigners to revise existing designs, package the new bitstream programming files with theprovided sOFtware utilities, and update the remote system through the JTAG interface using theEmbedded JTAG ACE Player.

    标签: XAPP JTAG 424 ACE

    上传时间: 2013-11-14

    上传用户:JIMMYCB001

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides sOFtware Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-22

    上传用户:685

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and sOFtware architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets sOFtware developers and hardware designers start development simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-11-01

    上传用户:dingdingcandy

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中,测试结果表明,调制电路能正确选相,解调电路输出数据与QDPSK调制输入数据完全一致,达到了预期的设计要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ sOFtware platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2014-01-13

    上传用户:qoovoop