基于幅移键控技术ASK（Amplitude-Shift Keying），以C8051F340单片机作为监测终端控制器，C8051F330D单片机作为探测节点控制器，采用半双工的通信方式，通过监控终端和探测节点的无线收发电路，实现数据的双向无线传输。收发电路采用直径为0.8 mm的漆包线自行绕制成圆形空心线圈天线，天线直径为（3.4±0.3）cm。试验表明，探测节点与监测终端的通信距离为24 cm，通过桥接方式，节点收发功率为102 mW时，节点间的通信距离可达20 cm。与传统无线收发模块相比，该无线收发电路在受体积、功耗、成本限制的场合有广阔的应用前景。 Abstract: Based on ASK technology and with the C8051F340 and C8051F330D MCU as the controller， using half-duplex communication mode， this paper achieves bi-directional data transfer. Transceiver circuit constituted by enameled wire which diameter is 0.8mm and wound into a diameter （3.4±0.3） cm circular hollow coil antenna. Tests show that the communication distance between detection and monitoring of the terminal is 24cm，the distance is up to 20cm between two nodes when using the manner of bridging and the node transceiver power is 102mW. Compared with the conventional wireless transceiver modules， the circuit has wide application prospect in small size， low cost and low power consumption and other characteristics.
上传时间： 2013-10-19
上传用户：xz85592677
The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dotmatrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has40 outputs, of which 24 are programmable and configurable for the following ratios ofrows/columns: 32¤8, 24¤16, 16¤24 or 8¤32. The PCF8578 can function as a stand-alone LCDcontroller and driver for use in small systems. For larger systems it can be used inconjunction with up to 32 PCF8579s for which it has been optimized. Together these twodevices form a general purpose LCD dot matrix driver chip set, capable of driving displaysof up to 40960 dots. The PCF8578 is compatible with most microcontrollers andcommunicates via a two-line bidirectional bus (I2C-bus). Communication overhead isminimized by a display RAM with auto-incremented addressing and display bankswitching.
上传时间： 2013-10-23
上传用户：顶得柱
1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (external supplyalso possible)– generation of intermediate LCD bias voltages– oscillator requires no external components (externalclock also possible)· Display data RAM: 80 characters· Character generator ROM: 240 characters· Character generator RAM: 16 characters· 4 or 8-bit parallel bus or 2-wire I2C-bus interface· CMOS/TTL compatible· 32 row, 60 column outputs· MUX rates 1 : 32 and 1 : 16· Uses common 11 code instruction set· Logic supply voltage range, VDD - VSS: 2.5 to 6 V· Display supply voltage range, VDD - VLCD: 3.5 to 9 V· Low power consumption· I2C-bus address: 011101 SA0.
上传时间： 2013-11-08
上传用户：laozhanshi111
The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG pin at VCC) or 128registers of 8 bits (ORG pin at GND). Each register can be written (orread) serially by using the DI (or DO) pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.
上传时间： 2013-11-20
上传用户：ynzfm
介绍了用单片机C 语言实现无功补偿中电容组循环投切的基本原理和算法，并举例说明。关键词：循环投切;C51;无功补偿中图分类号： TM76 文献标识码： BAbstract: This paper introduces the aplication of C51 in the controlling of capacitorsuits cycle powered to be on and off in reactive compensation.it illustrate thefondamental principle and algorithm with example.Key words: cycle powered to be on and off; C51; reactive compensation 为提高功率因数，往往采用补偿电容的方法来实现。而电容器的容量是由实时功率因数与标准值进行比较来决定的，实时功率因数小于标准值时，需投入电容组，实时功率因数大于标准值时，则需切除电容组。投切方式的不合理，会对电容器造成损坏，现有的控制器多采用“顺序投切”方式，在这种投切方式下排序在前的电容器组，先投后切；而后面的却后投先切。这不仅使处于前面的电容组经常处于运行状态，积累热量不易散失，影响其使用寿命，而且使后面的投切开关经常动作，同样减少寿命。合理的投切方式应为“循环投切”。这种投切方式使先投入的运行的电容组先退出，后投的后切除，从而使各组电容及投切开关使用机率均等，降低了电容组的平均运行温度，减少了投切开关的动作次数，延长了其使用寿命。
上传时间： 2014-12-27
上传用户：hopy
The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.
上传时间： 2013-10-26
上传用户：fengweihao158@163.com
PICKIT™ 2 PROGRAMMER-TO-GO USER GUIDE The PICkit 2 Programmer-To-Go functionality allows a PIC MCU memory image to be downloaded into the PICkit 2 unit for later programming into a specific PIC MCU. No software or PC is required to program devices once the PICkit 2 unit is set up for Programming-To-Go. A USB power source for the PICkit 2 is all that is needed.
标签： PROGRAMMER-TO PICKIT 8482
上传时间： 2013-10-29
上传用户：ca05991270
根据看门狗电路的原理，设计出简单适用、性能可靠的1TrL型看门狗电路以及价格低廉、性能可靠的微功耗CMOS型看门狗电路，同时还介绍了常用的uP监视器O型看门狗电路。关键词：看门狗电路；1TrL型；CMOS型Abstract：In accordance with the principle of WDT (Watch Dog Timer 1circuit，design a，IT．L type WTD circuit，it is a dimple an d applicable an d reliable on performanceo Design a CMOS type WTD circuit，it is low prices and mini-power consumption。Also the article describes a common uP type WTD circuit。Key word：WDT circuit；TFL type；CMOS typ e
上传时间： 2013-11-05
上传用户：685
The LPC1700 Ethernet block contains a full featured 10 Mbps or 100 Mbps Ethernet MAC (Media Access Controller) designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity. Automatic frame transmission and reception with Scatter-Gather DMA off-loads many operations from the CPU.
上传时间： 2013-11-09
上传用户：geshaowei
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
标签： Spartan-DSP Virtex FPGAs Ap
上传时间： 2013-10-23
上传用户：raron1989
