//芯片资料请到www.elecfans.com查找 //DS1820 C51 子程序//这里以11.0592M晶体为例，不同的晶体速度可能需要调整延时的时间//sbit DQ =P2^1;//根据实际情况定义端口 typedef unsigned char byte;typedef unsigned int word; //延时void delay(word useconds){ for(;useconds>0;useconds--);} //复位byte ow_reset(void){ byte presence; DQ = 0; //pull DQ line low delay(29); // leave it low for 480us DQ = 1; // allow line to return high delay(3); // wait for presence presence = DQ; // get presence signal delay(25); // wait for end of timeslot return(presence); // presence signal returned} // 0=presence, 1 = no pARt //从 1-wire 总线上读取一个字节byte read_byte(void){ byte i; byte value = 0; for (i=8;i>0;i--) { value>>=1; DQ = 0; // pull DQ low to start timeslot DQ = 1; // then return high delay(1); //for (i=0; i<3; i++); if(DQ)value|=0x80; delay(6); // wait for rest of timeslot } return(value);} //向 1-WIRE 总线上写一个字节void write_byte(char val){ byte i; for (i=8; i>0; i--) // writes byte, one bit at a time { DQ = 0; // pull DQ low to start timeslot DQ = val&0x01; delay(5); // hold value for remainder of timeslot DQ = 1; val=val/2; } delay(5);} //读取温度char Read_Temperature(void){ union{ byte c[2]; int x; }temp; ow_reset(); write_byte(0xCC); // Skip ROM write_byte(0xBE); // Read Scratch Pad temp.c[1]=read_byte(); temp.c[0]=read_byte(); ow_reset(); write_byte(0xCC); //Skip ROM write_byte(0x44); // Start Conversion return temp.x/2;}
上传时间： 2013-11-03
上传用户：hongmo
This application note provides a detailed description of the SpARtan™-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the pARt. Additionally, a methodology ispresented that will guide the user through the readback process. This information can be usedfor pARtial reconfiguration or pARtial readback.
上传时间： 2013-11-05
上传用户：透明的心情
This application note shows how to achieve low-cost, efficient serial configuration for SpARtan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, pARt count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing SpARtan configuration.In pARticular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a SpARtan design in the field by sending thebitstream over a network.
上传时间： 2014-08-16
上传用户：adada
The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become pARt of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.
上传时间： 2013-11-12
上传用户：q123321
Field Programmable Gate Arrays (FPGAs) are becoming a critical pARt of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
上传时间： 2013-10-29
上传用户：lixqiang
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the pARt is externally programmed?
上传时间： 2013-11-06
上传用户：wl9454
The field of microelectromechanical systems (MEMS), pARticularly micromachinedmechanical transducers, has been expanding over recent years, and the productioncosts of these devices continue to fall. Using materials, fabrication processes, anddesign tools originally developed for the microelectronic circuits industry, newtypes of microengineered device are evolving all the time—many offering numerousadvantages over their traditional counterpARts. The electrical properties of siliconhave been well understood for many years, but it is the mechanical properties thathave been exploited in many examples of MEMS. This book may seem slightlyunusual in that it has four editors. However, since we all work together in this fieldwithin the School of Electronics and Computer Science at the University of Southampton,it seemed natural to work together on a project like this. MEMS are nowappearing as pARt of the syllabus for both undergraduate and postgraduate coursesat many universities, and we hope that this book will complement the teaching thatis taking place in this area.
上传时间： 2013-10-16
上传用户：朗朗乾坤
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,pARt of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor
上传时间： 2013-11-07
上传用户：swing
The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All pARts of the CompactFlash Specification are protected by copyright law and all rights are reserved. Thisdocumentation may not, in whole or in pARt, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.
标签： 技术资料
上传时间： 2013-10-08
上传用户：stewart·
Agilent AN 154 S-Parameter Design Application Note S参数的设计与应用 The need for new high-frequency, solid-state circuitdesign techniques has been recognized both by microwaveengineers and circuit designers. These engineersare being asked to design solid state circuitsthat will operate at higher and higher frequencies.The development of microwave transistors andAgilent Technologies’ network analysis instrumentationsystems that permit complete network characterizationin the microwave frequency rangehave greatly assisted these engineers in their work.The Agilent Microwave Division’s lab staff hasdeveloped a high frequency circuit design seminarto assist their counterpARts in R&D labs throughoutthe world. This seminar has been presentedin a number of locations in the United States andEurope.From the experience gained in presenting this originalseminar, we have developed a four-pARt videotape, S-Parameter Design Seminar. While the technologyof high frequency circuit design is everchanging, the concepts upon which this technologyhas been built are relatively invariant.The content of the S-Parameter Design Seminar isas follows:
标签： S参数
上传时间： 2013-12-19
上传用户：aa54
