pc104接口的verilog代码，仅供参考
上传时间： 2013-09-03
上传用户：chukeey
结合XILINXCPLD所做的模拟RS232通信verilog源程序
标签： XILINXCPLD verilog 232 RS
上传时间： 2013-09-03
上传用户：gps6888
这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.
上传时间： 2013-09-04
上传用户：pkkkkp
i2c code for the verilog
上传时间： 2013-09-04
上传用户：DXM35
Cadence guide for verilog
上传时间： 2013-09-04
上传用户：123454
以verilog HDL 语言编写的一首歌曲，可供初学者借鉴
上传时间： 2013-09-05
上传用户：wyiman
VERILOG HDL 实际工控项目源码\r\n开发工具 altera quartus2
上传时间： 2013-09-05
上传用户：youmo81
Cadence Verilog Language and Simulation
标签： Simulation Language Cadence Verilog
上传时间： 2013-09-06
上传用户：yl1140vista
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
标签： Efficient Verilog Digital Coding
上传时间： 2013-11-22
上传用户：han_zh
本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
标签： Verilog verilog System VHDL
上传时间： 2013-10-16
上传用户：牛布牛
