PCI(外设部件互连)是当今个人计算机的主流总线结构，是微型计算机中处理器/存储器与外围控制部件、扩展卡之间的互连接口。PCI局部总线规范是互连机构的协议，也是电气和机械配置的规范。 本书分为9章，涵盖了PCI局部总线规范2.2版及其最新进展，详细介绍了PCI局部总线的原理和操作，内容包括PCI局部总线的基本概念、信号的定义、总线的操作、电气规范、机械规范、配置空间、66 mhz规范、BIOS和PCI-PCI桥等。书中通过大量的时序波形和实例对PCI局部总线的实际应用进行了深入浅出的阐述。
上传时间： 2013-12-16
上传用户：wangyi39
卫星调谐器 DBS TUNER The TA1322FN is a wideband down-converter which can operate at input frequency ranging from 850 mhz to 2200 mhz. Intended primarily for use in satellite tuners, this IC includes an oscillator, a mixer, an IF amplifier and a PLL.
标签： down-converter frequency wideband operate
上传时间： 2017-06-17
上传用户：xinyuzhiqiwuwu
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 mhz. With USB 2.0 signaling running at hundreds of mhz, the existing design methodology must change.
标签： technology 2.0 USB designed
上传时间： 2014-01-02
上传用户：二驱蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 mhz. With USB 2.0 signaling running at hundreds of mhz, the existing design methodology must change.
标签： technology 2.0 USB designed
上传时间： 2017-07-05
上传用户：zhoujunzhen
Chip type : ATmega16L Program type : Application Clock frequency : 4.000000 mhz Memory model : Small External SRAM size : 0 Data Stack size : 256
标签： type Application frequency 4.000000
上传时间： 2014-01-08
上传用户：lx9076
Omap2420适合基于Linux、Windows和Symbian操作系统(OS)的高端手机应用。它是Omap 2系列产品中的第一款，而Omap2系列最终将会转向“调制解调和应用处理器”的混合领域。或许这款芯片最吸引人的地方就是多处理器内核，它包含了330mhz的ARM 11 RISC、220 mhz的TI C55 DSP、内含ARM7的成像和视频处理器，以及支持166 mhz移动DDR SDRAM的Imagination Technologies公司3-D图形处理器。该芯片还集成了显示和相机控制器、SDRAM和闪存控制器，并附加了60多个外围控制器。Omap 2420能够为高端多媒体应用提供强大支持，这些应用包括30fps通用中间格式(CIF)的视频会议、30fps的VGA编解码、VGA和TV显示，以及300万像素以上的相机。使用该芯片的手机设计已经进行了一段时间，估计马上就会投放市场
标签： Omap Windows Symbian Linux
上传时间： 2017-08-06
上传用户：agent
PTR2000 的Pin6 ( PWR) 与AT89C51 的P1. 0 相连,PTR2000 的Pin7 (TXEN) 与AT89C51 的P1. 1 相连,CS 直接接地,利用工作频道1 ,即433. 92 mhz. 通过汇编语言对其编程.
上传时间： 2014-01-11
上传用户：qilin
1 系统功能 本系统拟定对频率范围在1~50 kHz左右的TTL电平脉冲序列进行多路延迟处理。各路延迟时间分别由单片机动态设定，最大延迟时间为1 ms，最大分辨率为0.15 ns级。 3 方案实现 系统选用Actel公司的ProASIC3 A3P250芯片实现数字部分。系统时钟由外部50 mhz晶振提供，时钟引脚连接到FPGA的CCC全局时钟引脚上；频率可以通过FPGA内部的PLL实现倍频和分频，设定需要的频率。由于在多路脉冲延迟方案中电路的同步是保证控制正确的条件，所以应该首先为电路提供一个基准脉冲。
标签： FPGA的多路可控脉冲延迟
上传时间： 2015-04-25
上传用户：justgo123
LPC1700系列ARM是基于第二代ARM Cortex-M3内核的微控制器，是为嵌入式系统应用而设计的高性能、低功耗的32位微处理器，适用于仪器仪表、工业通讯、电机控制、灯光控制、报警系统等领域。其操作频率高达120mhz，采用3级流水线和哈佛结构，带独立的本地指令和数据总线以及用于外设的低性能的第三条总线，使得代码执行速度高达1.25MIPS/mhz，并包含1个支持随机跳转的内部预取指单元。 LPC1700系列ARM增加了一个专用的Flash存储器加速模块，使得在Flash中运行代码能够达到较理想的性能。
标签： lpc1752
上传时间： 2016-03-04
上传用户：hahaha456
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio™ suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-mhz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio™ Software Development Environment 135-mhz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上传时间： 2016-05-06
上传用户：fagong
