使用到的参数跟谈到弹性网络的那一章里头所讲的是一样的， ke 则是终止条件。如果 step 被打勾，则程式在每一步之间会暂停 100毫秒（或其他使用者输入的数值）。如果 Random 被打勾，则程式会以系统时间作为乱数产生器的种子数，否则，就以使用者输入的数（ Random 右边那一格）为种子数。 你可以利用 load 来载入推销员问题档与其最佳解，如此便可比较弹性网络所找出来的解与最佳解差了多少。 Central, Radius, and Error 这三个参数的前两个，只影响弹性网络的起使位置和大小，对求解没有影响。第三个参数代表城市与网络点之间的容忍距离，也就是说，如果某城市与某网络点之间的距离，小于容忍距离，那就把这个城市当成是被该网络点所拜访。 按下小 w按钮会将目前的结果与参数值写到“en.out”这个档案。使得我们可以很方便地来比较不同参数的效果。
上传时间： 2013-12-17
上传用户：84425894
第一版YL2410开发板的BIOS 功能比较简单，上电之后，LCD显示蓝色、绿色、红色三个竖条 同时串口显示如下： Power on reset ************************************ * * * YL2410 Board BIOS V2006 * * Http://www.ucdragon.com * * * ************************************ NAND Flash Boot Please select function : 0 : USB download file（通过USB下载文件） 1 : Uart download file（通过串口下载文件） 2 : Write Nand flash with download file（将下载的文件烧写到NandFlash） 3 : load Pragram from Nand flash and run（从NandFlash装载文件并运行） 4 : Erase Nand flash regions（擦除NandFlash区域） 5 : Write NOR flash with download file（将下载的文件烧写到NorFlash） 6 : Set boot params（设置Linux启动相关参数） 7 : Set AutoBoot parameter,1:linux 2:wince(设置WINCE自启动）
上传时间： 2015-09-15
上传用户：Amygdala
Linux driver for FujiFilm FinePix digital cameras in PC-CAM (i.e. webcam) mode driver/ Contains the driver sources. Compile with "make". Then as root, install with "make install". Type "modprobe finepix" to load the module. userspace/ Type "make" to compile. fpix: test program, independant of the driver. Uses libusb to directly access the camera and capture a frame, saved under frame.jpg. Will not work if the driver is loaded. fpixtest: test program. Uses V4L2 to capture an image. fpix-stress-v4l2: never ending (in theory) stress test derived from fpixtest.
标签： driver i.e. FujiFilm FinePix
上传时间： 2014-11-28
上传用户：chenxichenyue
There is an example of how to use the LDPC encode/decode with AWGN channel model in files .\ldpc_decode.m and .\GFq\ldpc_decode.m. There are a few parity check matrices available in the code but you can use other matrices provided you have enough memory to load them. I suggest checking out matrices in Alist format available on David MacKay s web site.You will need to have access to a MEX compiler to be able to use a few functions written in C. LDPC的仿真代码
标签： example channel ldpc_de encode
上传时间： 2013-12-03
上传用户：lili123
VC6.0开发环境下开发的ATA接口控制程序，用户可以在图形界面下对插入个人电脑的ATA接口的硬盘进行一系列的操作（比如load 磁头，让磁头进行寻道），该软件支持ATA３协议的部分命令，需要进一步完善）．
上传时间： 2015-09-26
上传用户：xieguodong1234
The Staged Event-Driven Architecture (SEDA) is a new design for building scalable Internet services. SEDA has three major goals: To support massive concurrency, on the order of tens of thousands of clients per node To exhibit robust performance under wide variations in load and, To simplify the design of complex Internet services. SEDA decomposes a complex, event-driven application into a set of stages connected by queues. This design avoids the high overhead associated with thread-based concurrency models, and decouples event and thread scheduling from application logic. SEDA enables services to be well-conditioned to load, preventing resources from being overcommitted when demand exceeds service capacity. Decomposing services into a set of stages also enables modularity and code reuse, as well as the development of debugging tools for complex event-driven applications.
标签： Event-Driven Architecture Internet building
上传时间： 2015-09-28
上传用户：日光微澜
把训练数据拷入，load的*.m文件中, 文件中部load的*.m为测试数据 save 存盘的文件为测试数据的bp预测值, 该程序可以扩充n个输入,n个输出,很容易
标签： 数据
上传时间： 2013-12-16
上传用户：comua
A frame with a text area to show the contents of a file inside a zip archive, a combo box to select different files in the archive, and a menu to load a new archive.
标签： contents archive inside frame
上传时间： 2015-10-27
上传用户：koulian
转载：对神经网络中使用最广泛的一种：BP神经网络采用vbmatlab来实现，把训练数据拷入，load的*.m文件中, 文件中部load的*.m为测试数据 save 存盘的文件为测试数据的bp预测值, 该程序可以扩充n个输入,n个输出,很容易
上传时间： 2015-11-10
上传用户：xwd2010
This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
标签： Development Startix2 tailored Altera
上传时间： 2014-01-19
上传用户：chongcongying
