锁定放大是微弱信号检测的重要手段。基于相关检测理论，利用开关电容的开关实现锁定放大器中乘法器的功能，提出开关电容和积分器相结合以实现相关检测的方法，并设计出一种锁定放大器。该锁定放大器将微弱信号转化为与之相关的方波，通过后续电路得到正比于被测信号的直流电平，为后续采集处理提供方便。测量数据表明锁定放大器前级可将10-6 A的电流转换为10-1 V的电压，后级通过带通滤波器级联可将信号放大1×105倍。该方法在降低噪声的同时，可对微弱信号进行放大，线性度较高、稳定性较好。 Abstract: Lock-in Amplifying（LIA）is one of important means for weak signal detection. Based on cross-correlation detection theory， switch in the swithched capacitor was used as multiplier of LIA， and a new method of correlation detection was proposed combining swithched capacitor with integrator. A kind of LIA was designed which can convert the weak signal to square-wave， then DC proportional to measured signal was obtained through follow-up conditioning circuit， providing convenience for signal acquisition and processing. The measured data shows that the electric current（10-6 A） can be changed into voltage（10-1 V） by LIA， and the signal is magnified 1×105 times by cascade band-pass filter. The noise is suppressed and the weak signal is amplified. It has the advantages of good linearity and stability.
上传时间： 2013-11-29
上传用户：黑漆漆
摘要 本研究计划之目的，在整合应用以ARM为基础的嵌入式多媒体实时操作系统于H.264/MPEG-4多媒体上。由于H.264是一种因应实时系统(RTOS)所设计的可扩展性串流传输(scalability stream media communication)的编码技术。H.264主要架构于细细粒可扩展(Fine Granula Scalability,FGS)的压缩编码机制。细粒度可扩展压缩编码技术是最新MPEG-4串流式传输标准，能依频寛的差异来调整传输的方式。细粒度扩展缩编码技术以编入可选择性的增强层(enhanced layers)于码中，来提高影像传输的质量。本计划主要在于设计一种简单有效的实时阶层可扩展的影像传输系统。在增强层编码及H.264的基本层(base layer)编码上使用渐进的细粒度可扩展编码(Progressive Fine Granularity Scalable,PFGS)能直接使用H.264的格式特色来实现FGS。同时加入了LB-LLF(Layer-Based Least-Laxity-Fir stscheduling algorithm)的排程算法，来增 进网路传输影像的质量。由实验结果显示本系统在串流影像质量PSNR值上确有较佳的效能。
上传时间： 2014-12-26
上传用户：mpquest
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上传时间： 2013-10-22
上传用户：liu999666
在现代通信系统中，电话语音的频带被限制在300 Hz～4 kHz的范围内，带来了语音可懂度和自然度的降低。为了在不增加额外成本的前提下提高语音的可懂度和自然度，进行了电话语音频带扩展的研究。提出了一种改进的基于码本映射的语音带宽扩展算法：在码本映射的过程中，使用加权系数来得到映射码本。客观测试结果表明，用此算法得到的宽带语音的谱失真度比用一般的码本映射降低至少2%。主观测试结果表明，用此算法得到的宽带语音具有更好的可懂度和自然度。 Abstract: In modern communication systems， the bandwidth of telephone speech is limited from 300Hz to 4 kHz， which reduces the intelligibility and naturalness of speech. Telephone speech bandwidth extension is researched to get wideband speech and to improve its intelligibility and naturalness， without increasing extra costs. This paper put forward an improved algorithm of speech bandwidth extension based on codebook mapping. In the process of codebook mapping， weighted coefficients were used to get mapping codebook. Objective tests show that spectral distortion of wideband speech obtained by this algorithm reduces at least 2%， comparing to conditional codebook mapping. Subjective tests show that the wideband speech obtained by this algorithm has better intelligibility and naturalness.
上传时间： 2014-12-29
上传用户：15501536189
6小时学会labview, labview Six Hour Course – Instructor Notes This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI. The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
标签： labview
上传时间： 2013-10-13
上传用户：zjwangyichao
PCB线宽和电流关系公式 先计算Track的截面积，大部分PCB的铜箔厚度为35um（即 1oz）它乘上线宽就是截面积，注意换算成平方毫米。 有一个电流密度经验值，为15~25安培/平方毫米。把它称上截面积就得到通流容量。 I=KT（0.44）A（0.75）， 括号里面是指数， K为修正系数，一般覆铜线在内层时取0.024，在外层时取0.048 T为最大温升，单位为摄氏度（铜的熔点是1060℃） A为覆铜截面积，单位为square mil. I为容许的最大电流，单位为安培。 一般 10mil=0.010inch=0.254mm 1A ， 250mil=6.35mm 8.3A ？倍数关系，与公式不符 ？
上传时间： 2013-11-12
上传用户：ljd123456
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上传时间： 2013-10-22
上传用户：aeiouetla
21天学会用JAVA开发网络游戏 书籍语言： 简体中文 书籍类型： 程序设计 授权方式： 免费软件 书籍大小： 287 KB 书籍等级： 整理时间： 2004-11-3 20:41:10 With all of the media attention that is focused on the Internet and the World Wide Web, figuring out exactly what they are all about is sometimes difficult. Are they just a neat new way to market products or will they truly offer us a new medium of communication that will someday surpass even televisions and telephones? The answer is, who knows? Unfortunately, the ultimate use for the Internet is still unknown. This is because it is still in such a state of flux that it s pretty much impossible to accurately predict where it will end up. However, you can look at the evidence of what is there now and gain some insight into what the Internet might become, at least in terms of games.
上传时间： 2013-12-20
上传用户：天诚24
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
标签： the Analyzer Compiler project
上传时间： 2013-12-19
上传用户：Yukiseop
物流分析工具包。Facility location: Continuous minisum facility location, alternate location-allocation (ALA) procedure, discrete uncapacitated facility location Vehicle routing: VRP, VRP with time windows, traveling salesman problem (TSP) Networks: Shortest path, min cost network flow, minimum spanning tree problems Geocoding: U.S. city or ZIP code to longitude and latitude, longitude and latitude to nearest city, Mercator projection plotting Layout: Steepest descent pairwise interchange (SDPI) heuristic for QAP Material handling: Equipment selection General purpose: Linear programming using the revised simplex method, mixed-integer linear programming (MILP) branch and bound procedure Data: U.S. cities with populations of at least 10,000, U.S. highway network (Oak Ridge National Highway Network), U.S. 3- and 5-digit ZIP codes
标签： location location-allocation Continuous alternate
上传时间： 2015-05-17
上传用户：kikye
