The Industrial Revolution, which started in England around 1760, has replaced human muscle power with the machine. Artificial intelligence (AI) aims at replacing human intelligence with the machine. The work on artificial intelligence started in the early 1950s, and the term itself was coined in 1956.
标签： Fundamentals Intelligence Artificial New the of
上传时间： 2020-06-10
上传用户：shancjb
Much has been written concerning the manner in which healthcare is changing, with a particular emphasis on how very large quantities of data are now being routinely collected during the routine care of patients. The use of machine learning meth- ods to turn these ever-growing quantities of data into interventions that can improve patient outcomes seems as if it should be an obvious path to take. However, the field of machine learning in healthcare is still in its infancy. This book, kindly supported by the Institution of Engineering andTechnology, aims to provide a “snap- shot” of the state of current research at the interface between machine learning and healthcare.
标签： Technologies Healthcare Learning Machine
上传时间： 2020-06-10
上传用户：shancjb
产品型号：VK0384 产品品牌：VINTEK/元泰/VINKA 封装形式: LQFP64 替代型号：HT1623 原厂直销，工程服务，技术支持，价格更具优势！ 概述： VK0384是一个48x8的LCD駆动器. 可软件程控使其适用于多样化的LCD应用线路. 仅用到3至4条讯号线便可控制LCD駆动器,除此之外亦可介由指令使其进入省电模式 特色 工作电压: 2.4V~5.2V 内建256KHz RC oscillator 提供1/4 偏压1/8 COM 周期 省电模式 48x8 LCD駆动器 内建48x8 bit 显示内存 3-wire serial interface 软件程控 资料及指令模式 VLCD 脚位可用来调整LCD输出电压 内建电阻式偏压产生线路 8种WDT的基频选择 定时器及WDT的溢位输出 两种蜂鸣器频率(2KHz/4KHz) 内建time base generator 以及WDT Time base or WDT 溢位输出
上传时间： 2020-09-19
上传用户：2937735731
基于界面操作的人脸心率检测的代码，通过摄像头实时采集人视频，并计算心率(Face the heart rate detection interface operation based on the code, through real-time acquisition one camera video, and rate)
上传时间： 2021-02-24
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FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。1 实验简介在前面的实验中我们练习了 SD 卡读写，VGA 视频显示等例程，本实验将 SD 卡里的 BMP 图片读出，写入到外部存储器，再通过 VGA、LCD 等显示。本实验如果通过液晶屏显示，需要有液晶屏模块。2 实验原理在前面的实验中我们在 VGA、LCD 上显示的是彩条，是 FPGA 内部产生的数据，本实验将彩条替换为 SD 内的 BMP 图片数据，但是 SD 卡读取速度远远不能满足显示速度的要求，只能先写入外部高速 RAM，再读出后给视频时序模块显示module top( input clk, input rst_n, input key1, output [5:0] seg_sel, output [7:0] seg_data, output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sd_ncs, //SD card chip select (SPI mode) output sd_dclk, //SD card clock output sd_mosi, //SD card controller data output input sd_miso, //SD card controller data input output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data);parameter MEM_DATA_BITS = 16 ; //external memory user interface data widthparameter ADDR_BITS = 24
标签： fpga
上传时间： 2021-10-27
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IIC接口E2PROM(AT24C64) 读写VERILOG 驱动源码+仿真激励文件:module i2c_dri #( parameter SLAVE_ADDR = 7'b1010000 , //EEPROM从机地址 parameter CLK_FREQ = 26'd50_000_000, //模块输入的时钟频率 parameter I2C_FREQ = 18'd250_000 //IIC_SCL的时钟频率 ) ( input clk , input rst_n , //i2c interface input i2c_exec , //I2C触发执行信号 input bit_ctrl , //字地址位控制(16b/8b) input i2c_rh_wl , //I2C读写控制信号 input [15:0] i2c_addr , //I2C器件内地址 input [ 7:0] i2c_data_w , //I2C要写的数据 output reg [ 7:0] i2c_data_r , //I2C读出的数据 output reg i2c_done , //I2C一次操作完成 output reg i2c_ack , //I2C应答标志 0:应答 1:未应答 output reg scl , //I2C的SCL时钟信号 inout sda , //I2C的SDA信号 //user interface output reg dri_clk //驱动I2C操作的驱动时钟 );//localparam definelocalparam st_idle = 8'b0000_0001; //空闲状态localparam st_sladdr = 8'b0000_0010; //发送器件地址(slave address)localparam st_addr16 = 8'b0000_0100; //发送16位字地址localparam st_addr8 = 8'b0000_1000; //发送8位字地址localparam st_data_wr = 8'b0001_0000; //写数据(8 bit)localparam st_addr_rd = 8'b0010_0000; //发送器件地址读localparam st_data_rd = 8'b0100_0000; //读数据(8 bit)localparam st_stop = 8'b1000_0000; //结束I2C操作//reg definereg sda_dir ; //I2C数据(SDA)方向控制reg sda_out ; //SDA输出信号reg st_done ; //状态结束reg wr_flag ; //写标志reg [ 6:0] cnt ; //计数reg [ 7:0] cur_state ; //状态机当前状态reg [ 7:0] next_state; //状态机下一状态reg [15:0] addr_t ; //地址reg [ 7:0] data_r ; //读取的数据reg [ 7:0] data_wr_t ; //I2C需写的数据的临时寄存reg [ 9:0] clk_cnt ; //分频时
标签： iic 接口 e2prom at24c64 verilog 驱动 仿真
上传时间： 2021-11-05
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The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable,it supports the development,verification, synthesis,and testing of hardware designs; the communication of hardware design data; and the maintenance,modification,and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.
上传时间： 2021-11-09
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iec61162标准iec61162-1{ed4.0}en_digital interface
上传时间： 2021-11-22
上传用户：jiabin
It all started rather innocuously. I walked into Dr GT Murthy’s office one fine day, andchanged my life. “Doc” was then the General Manager, Central R&D, of a very largeelectrical company headquartered in Bombay. In his new state-of-the-art electronics center,he had hand-picked some of India’s best engineers (over a hundred already) ever assembledunder one roof. Luckily, he too was originally a Physicist, and that certainly helped me gainsome empathy. Nowadays he is in retirement, but I will always remember him as athoroughly fair, honest and facts-oriented person, who led by example. There were severalthings I absorbed from him that are very much part of my basic engineering persona today.You can certainly look upon this book as an extension of what Doc started many years agoin India … because that’s what it really is! I certainly wouldn’t be here today if I hadn’t metDoc. And in fact, several of the brash, high-flying managers I’ve met in recent years,desperately need some sort of crash course in technology and human values from Doc!
标签： 开关电源
上传时间： 2021-11-23
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CH340C+RT9013+MINI USB接口板 AD设计硬件原理图+PCB文件,ALTIUM设计的2层板设计，包括完整的原理图和PCB文件，主要器件如下：Library Component Count : 12Name Description----------------------------------------------------------------------------------------------------CAP CapacitorCC2640EM CC2630 ModuleCH340 CH340 USB 2 UARTCON11 Connector 11pinsCON12 Connector 12pinsCON3X2 Connector 5*2LED LEDRES ResistorRT9013 RT9013 3.3VSWITCH switch 6*6USB1 USB ConnectorsXDS110-Lte XDS110-Lite Target Interface
上传时间： 2021-11-24
上传用户：canderile
