Abstract: high-PERFORMANCE base-station (BTS) receivers must meet half-IF spurious requirements, whichcan be achieved by using the proper RF mixer. To help engineers, this application note illustrates the
上传时间： 2013-10-17
上传用户：daoxiang126
Abstract: Field-programmable gate arrays (FPGAs) are used in a wide variety of applications and end markets, including digital signalprocessing, medical imaging, and high-PERFORMANCE computing. This application note outlines the issues related to powering FPGAs.It also discusses Maxim's solutions for powering Xilinx® FPGAs.
上传时间： 2013-12-16
上传用户：haohaoxuexi
We offer a broad line of high performance low dropout (LDO) linear regulators with fasttransient response, excellent line and load regulation, and very wide input voltage rangefrom 0.9V to 100V. Output currents range from 20mA to 10A, with positive, negative andmultiple output versions available. Many devices offer output voltage operation <0.8V andsome feature operation as low as 0V, even with a single supply. Most are stable with ceramicoutput capacitors. LDO regulators can be applied in virtually any application.
上传时间： 2013-11-15
上传用户：努力努力再努力
为了能够满足基站易于选址、优质快速的建站要求和易维护、低成本、高可靠的运行要求，本文对以方舱来实现一体化结构基站做出一番探讨。从系统设计的观点阐述了移动通信高性能基站天线设计的几个关键问题，介绍了智能天线技术在基站中的应用，并且用HFSS软件仿真了一种新型的对称阵子天线，该天线驻波比小于2的带宽可以达到60%，具有良好的宽频带特性。 Abstract: In order to meet the station construction requirement of easy site selection and fast base station， and meet the operational requirement of easy maintenance， low cost and high reliability， this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design， the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS， the VSWR of the antenna is less than 2， and the bandwidth was reach to 60%. So it has good broadband properties.
上传时间： 2013-11-20
上传用户：linlin
The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).
上传时间： 2013-10-10
上传用户：geshaowei
This application note describes how to implement the Bus LVDS (BLVDS) interface in the supported Altera ® device families for high-PERFORMANCE multipoint applications. This application note also shows the performance analysis of a multipoint application with the Cyclone III BLVDS example.
标签： Implementing LVDS 522 Bus
上传时间： 2013-10-26
上传用户：苏苏苏苏
XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接 The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and 1.8V. In circumstances that require an HP 1.8V I/O bank to interface with 2.5V or 3.3V logic, a range of options can be deployed. This application note describes methodologies for interfacing 7 series HP I/O banks with 2.5V and 3.3V systems
上传时间： 2013-11-06
上传用户：wentianyou
Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-PERFORMANCE computing, switching, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.
上传时间： 2013-11-19
上传用户：m62383408
The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。 Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-PERFORMANCE digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM. The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
上传时间： 2013-10-28
上传用户：wujijunshi
SDL Library Documentation. The SDL library is designed to make it easy to write games that run on Linux, *BSD, MacOS, Win32 and BeOS using the various native high-PERFORMANCE media interfaces, (for video, audio, etc) and presenting a single source-code level API to your application. SDL is a fairly low level API, but using it, completely portable applications can be written with a great deal of flexibility.
标签： Documentation SDL designed Library
上传时间： 2015-06-23
上传用户：nanxia
