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hardware-description

  • 51编程指南--MCSÉ-51 Program

    MCSÉ-51 Programmer's Guide and Instruction Set The information presented in this chapter is collected from the MCSÉ-51 Architectural Overview and the HardwareDescription of the 8051, 8052 and 80C51 chapters of this book. The material has been selected and rearranged toform a quick and convenient reference for the programmers of the MCS-51. This guide pertains specifically to the8051, 8052 and 80C51.

    标签: Program Eacute MCS 51

    上传时间: 2013-11-13

    上传用户:hj_18

  • The Hardware Book (WinHelp32)

    The Hardware Book (WinHelp32) Information from The Hardware Book

    标签: Hardware WinHelp Book The

    上传时间: 2013-11-23

    上传用户:cepsypeng

  • 基于(英蓓特)STM32V100的串口程序

    This example provides a description of how  to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow:    - BaudRate = 115200 baud      - Word Length = 8 Bits    - One Stop Bit    - No parity    - Hardware flow control enabled (RTS and CTS signals)    - Receive and transmit enabled    - USART Clock disabled    - USART CPOL: Clock is active low    - USART CPHA: Data is captured on the second edge     - USART LastBit: The clock pulse of the last data bit is not output to                      the SCLK pin

    标签: V100 STM 100 32V

    上传时间: 2013-10-31

    上传用户:yy_cn

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    标签: Modelling Guide Navy VHDL

    上传时间: 2013-11-20

    上传用户:pzw421125

  • 7811 reference hardware

    7811 reference hardware

    标签: reference hardware 7811

    上传时间: 2013-12-21

    上传用户:Ants

  • Filename: main.c * Description: A simple test program for the CRC implementations. * Notes: To test

    Filename: main.c * Description: A simple test program for the CRC implementations. * Notes: To test a different CRC standard, modify crc.h. * * * Copyright (c) 2000 by Michael Barr. This software is placed into * the public domain and may be used for any purpose. However, this * notice must not be changed or removed and no warranty is either * expressed or implied by its publication or distribution.

    标签: test implementations Description Filename

    上传时间: 2015-02-02

    上传用户:leehom61

  • I. A brief description of the aiNet application. II. How to set up the aiNet on your system. III. So

    I. A brief description of the aiNet application. II. How to set up the aiNet on your system. III. Some tips on using the aiNet IV. Example files

    标签: aiNet I. application description

    上传时间: 2013-12-22

    上传用户:libenshu01

  • 手机流文件的处理程序源代码!The interface to an audio stream player passing audio data from the audio hardware to

    手机流文件的处理程序源代码!The interface to an audio stream player passing audio data from the audio hardware to specified buffers.

    标签: audio interface hardware passing

    上传时间: 2015-03-31

    上传用户:caixiaoxu26

  • 基于java的完整的RSA算法实现 /** * <p>Titre : RSA </p> * <p>Description : Encodage de donn閑s

    基于java的完整的RSA算法实现 /** * <p>Titre : RSA </p> * <p>Description : Encodage de donn閑s selon le protocole RSA </p> * <p>Copyright : Copyright (c) 2004</p> * @author Fran鏾is Bradette * @version 1.1 * version originale de Robert Sedgewick and Kevin Wayne.Copyright ? 2004 * pris sur le site http://www.cs.princeton.edu/introcs/104crypto/RSA.java.html * Modifier par Fran鏾is Bradette */

    标签: Description RSA Encodage gt

    上传时间: 2014-01-10

    上传用户:时代电子小智

  • Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant

    Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant of Bagging algorithm, whose purpose is to improve accuracy of local learners, such as kNN, through multi-model perturbing ensemble. Reference: Z.-H. Zhou and Y. Yu. Ensembling local learners through multimodal perturbation. IEEE Transactions on Systems, Man, and Cybernetics - Part B: Cybernetics, 2005, vol.35, no.4, pp.725-735.

    标签: Description Randomness Attribute Filtered

    上传时间: 2015-04-10

    上传用户:ynzfm