为解决传统可视倒车雷达视频字符叠加器结构复杂,可靠性差,成本高昂等问题,在可视倒车雷达设计中采用视频字符发生器芯片MAX7456。该芯片集成了所有用于产生用户定义OSD,并将其插入视频信号中所需的全部功能,仅需少量的外围阻容元件即可正常工作。给出了以MAX7456为核心的可视倒车雷达的软、硬件实现方案及设计实例。该方案具有电路结构简单、价格低廉、符合人体视觉习惯的特点。经实际装车测试,按该方案设计的可视倒车雷达视场清晰、提示字符醒目、工作可靠,可有效降低驾驶员倒车时的工作强度、减少倒车事故的发生。 Abstract: A new video and text generation chip,MAX7456,was used in the design of video parking sensor in order to simplify system structure,improve reliability and reduce cost. This chip included all the necessary functions to generate user-defined OSDs and to add them into the video signals. It could be put into work with addition of just a small number of resistances and capacitors. This paper provided software and hardware implementation solutions and design example based on the chip. The system had the characteristics of simplicity in circuit structure,lower cost,and comfort for the nature of human vision. Loading road test demonstrates high video and text display quality and reliable performance,which makes the driver easy to see backward and reduces chance of accidents.
上传时间: 2013-12-10
上传用户:qiaoyue
将现行的供暖计费方式由按建筑面积计费变为按消耗的热能计费是供暖计费方式发展趋势,为了满足这一计费方式变化的需要,设计了基于IC卡的预付费式新型供暖计费系统,通过测量用户采暖系统进出口的温度和流量,计算用户消耗的热能,利用IC卡记录用户预付费的金额和当年热能的单价,根据热能消耗和当年热能的单价计算用户采暖费,根据实际发生的供暖费用和预付费金额控制供暖的开停,这一计费方式的变化使供暖计费更趋合理。 Abstract: It is trend that the mode of heat charging is changed from billing by building area to by thermal energy. In order to meet the needs of heat charging mode changing, a new system of heat charging based on IC card is proposed. The user?蒺s energy consumption is calculated by measuring the user inlet and outlet temperature and flow,using the IC card to record the prepaid amount and the current price of heat. The user?蒺s heating costs is calculated according to energy consumption and current price, according to actual heating costs and prepaid amount,the system controls the heating opening or stopping. It is more reasonable that calculated heating costs by user heat consumption
上传时间: 2013-10-14
上传用户:大融融rr
为了在工业生产及过程控制中准确测量温度,设计了一种基于低功耗MSP430单片机的数字温度计。整个系统通过单片机MSP430F1121A控制DS18B20读取温度,采用数码管显示,温度传感器DS18B20与单片机之间通过串口进行数据传输。MSP430系列单片机具有超低功耗,且外围的整合性高,DS18B20只需一个端口即可实现数据通信,连接方便。通过多次实验证明,该系统的测试结果与实际环境温度一致,除了具有接口电路简单、测量精度高、误差小、可靠性高等特点外,其低成本、低功耗的特点使其拥有更广阔的应用前景。 Abstract: In order to obtain accurate measuring temperature in industrial production and process control, a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20, and gets the temperature data, which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration, DS18B20 only needs one port to achieve data communication. Through many experimental results prove, this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple, high measuring accuracy, minor error, high reliability, besides, the characteristics of low cost and low power make it having vaster application prospect.
上传时间: 2013-10-16
上传用户:wettetw
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标签: SUNPLUSIT Q-Writer 编程工具 使用说明书
上传时间: 2013-10-13
上传用户:brain kung
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标签: Assembly Language C6000 320C
上传时间: 2013-11-12
上传用户:chens000
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上传时间: 2013-10-23
上传用户:copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上传时间: 2014-04-02
上传用户:han_zh
MPC7400 Part Number SpeciÞcationThis document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.
上传时间: 2014-12-28
上传用户:huyahui
This document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.Part numbers addressed in this document are listed in Table A. For more detailed ordering information see Table B.
上传时间: 2013-11-19
上传用户:qiaoyue
针对使用硬件描述语言进行设计存在的问题,提出一种基于FPGA并采用DSP Builder作为设计工具的数字信号处理器设计方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ设计流程,设计了一个12阶FIR 低通数字滤波器,通过Quartus 时序仿真及嵌入式逻辑分析仪SignalTapⅡ硬件测试对设计进行了验证。结果表明,所设计的FIR 滤波器功能正确,性能良好。 Abstract: Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
上传时间: 2013-11-17
上传用户:lo25643