-- Booth Multiplier -- This file contains all the entity-Architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn
标签： entity-Architectures Multiplier contains complete
上传时间： 2015-07-02
上传用户：2467478207
-- Booth Multiplier -- This file contains all the entity-Architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check
标签： entity-Architectures Multiplier contains complete
上传时间： 2014-01-22
上传用户：lijianyu172
Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.
标签： architectures Three-input declaration alternative
上传时间： 2013-12-27
上传用户：liansi
jbuilder开发entity bean
上传时间： 2013-12-04
上传用户：zhoujunzhen
CRC Press Wireless Sensor Networks Architectures And Protocols電子書
标签： Architectures Protocols Networks Wireless
上传时间： 2013-11-25
上传用户：wff
通用寄存器的部分代码 LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL ENTITY traffic IS PORT(clk,sm,sb:IN bit mr,my,mg,br,by,bg:OUT bit ) END traffic
标签： IEEE STD_LOGIC LIBRARY traffic
上传时间： 2014-01-14
上传用户：水口鸿胜电器
addition/subtraction entity for the addition/subtraction unit
标签： subtraction addition entity unit
上传时间： 2014-01-16
上传用户：gtzj
VLSI Algorithms and Architectures for JPEG2000.pdf
标签： Architectures Algorithms VLSI 2000
上传时间： 2015-12-11
上传用户：yimoney
JPEG2000 Standard for Image Compression Concepts, Algorithms and VLSI Architectures
标签： Architectures Compression Algorithms Concepts
上传时间： 2013-12-23
上传用户：cc1915
Auerbach Wireless Mesh Networking Architectures Protocols and Standards,dec 2006
标签： Architectures Networking Protocols Standards
上传时间： 2014-01-25
上传用户：qq521
