The CAT9555 is a CMOS device that provides 16-bitparallel input/output port expansion for I²C and SMBuscompatible appliCations. These I/O expanders providea simple solution in appliCations where additional I/Osare needed: sensors, power switches, LEDs,pushbuttons, and fans.
上传时间： 2014-01-09
上传用户：1101055045
The CAT9534 is an 8-bit parallel input/output portexpander for I²C and SMBus compatible appliCations.These I/O expanders provide a simple solution inappliCations where additional I/Os are needed: sensors,power switches, LEDs, pushbuttons, and fans.The CAT9534 consists of an input port register, anoutput port register, a configuration register, a polarityinversion register and an I²C/SMBus-compatible serialinterface.
上传时间： 2013-11-09
上传用户：liulinshan2010
This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly implement a complete I²C multi-master system application.For specific appliCations the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, slave message transfers and multi-mastersystem appliCations. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.
上传时间： 2013-11-23
上传用户：weixiao99
The P90CL301 is a highly integrated 16/32 bit micro-controller especially suitable for appliCations requiring lowvoltage and low power consumption. It is fully software compatible with the 68000. Furthermore, it provides bothstandard as well as advanced peripheral functions on-chip.One of these peripheral functions is the I2C bus. This report describes worked-out driver software (written in C) toprogram the P90CL301 I2C interface. It also contains interface software routines offering the user a quick start inwriting a complete I2C system application.
上传时间： 2014-01-06
上传用户：气温达上千万的
The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard appliCations because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
上传时间： 2014-01-24
上传用户：zl5712176
The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family appliCations.
上传时间： 2013-10-21
上传用户：xiaozhiqban
一种基于ST62单片机的称重显示控制器A Weighing Display Controller Based on ST62 Single Chip Computer祛 FA(上海时博飞奥控制系统有限公司，上海201100)摘要在介绍了基于ST62单片机的基础上，详细描述了称重显控制器的硬件设计和软件设计思路。该控制器结构简单、操作方便、抗扰能力强等优点;具有较好的推广应用价值。关键词称重显示控制仪ST62单片机硬件设计软件设计Abstract Ont heb asiso fin torductiono fST 62s inglec hipc omputer,th ed esignc oncrptof h ardwarea nds oftwarefo rw eighingd isplayc ontorleris d escrbed.The controler features simple structure, ease operation, powerful capability of anti-interference, etc.，it is wealth to be promoted into practicalappliCationsKeywords We妙吨display0 引言ST62s inglec hip Hardwared esign Softwaer design备 份 振 荡器，振荡器保护电路，上电复位及低压检测复称 重 显 示控制器是一种具有数字显示、开关量输出、定值控制和通信功能的以微机为操作核心的称重控制装置。它是电子衡器的重要基础部件，直接影响电子衡器及电子称重系统的功能和性能。与合适的传感器及承重传力复位系统组合可组成配料秤、料斗秤、定值秤、平台秤、汽车秤等，广泛应用于电力、化工、建筑、冶金、交通运输、食品、军工等部门，是进行自动称重配料控制和生产过程自动化必不可少的重要检测、控制装置。随着 称 重 计量自动化水平的提高，对称重显示控制器的要求也越来越高。为实现低漂移、高稳定，本控制器采用低漂移、高增益放大器AD620和高分辨率的A/D转换器CS5550。为提高稳定性和可靠性，采用集成度高的、抗干扰能力强的ST62单片机。
上传时间： 2013-10-29
上传用户：钓鳌牧马
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlappliCations.
上传时间： 2013-11-10
上传用户：1427796291
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding appliCations. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-13
上传用户：瓦力瓦力hong
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and appliCations that prescribe the particular requirements on functional safety systems in these industry appliCations. Example appliCations include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System
上传时间： 2013-11-05
上传用户：维子哥哥
