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analog-Digital-Converter

  • Design and Analysis of Analog Filters (英).pdf

    资料->【E】光盘论文->【E5】英文书籍->Design and Analysis of Analog Filters (英).pdf

    标签: Analysis Filters Design Analog

    上传时间: 2013-04-24

    上传用户:气温达上千万的

  • 直接数字频率合成(Direct Digital Fraquency Synthesis,即DDFS

    直接数字频率合成(Direct Digital Fraquency Synthesis,即DDFS,一般简称DDS)是从相位概念出发直接合成所需要波形的一种新的频率合成技术。

    标签: Fraquency Synthesis Digital Direct

    上传时间: 2013-08-27

    上传用户:wpt

  • fpga digital clock

    My thesis entitled \"fpga digital clock,\" immature, to enlighten

    标签: digital clock fpga

    上传时间: 2013-08-31

    上传用户:smallfish

  • Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

    Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

    标签: Implementation Recovery Receiver Software

    上传时间: 2013-09-05

    上传用户:panpanpan

  • Verilog Coding Style for Efficient Digital Design

      In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.

    标签: Efficient Verilog Digital Coding

    上传时间: 2013-11-22

    上传用户:han_zh

  • [模拟和数字电子电路基础].Agarwal.&.Lang.(2005).Foundations.of.Analog.and.Digital.Electronic.Circuits

    模拟和数字电子电路基础

    标签: Foundations Electronic Circuits Agarwal

    上传时间: 2013-11-15

    上传用户:fdfadfs

  • High-Speed Digital System Design

    Introduce High-Speed Digital System Design.

    标签: High-Speed Digital Design System

    上传时间: 2013-10-20

    上传用户:gps6888

  • 模拟IC性能的权衡 模拟到数字化设计的挑战

    Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.  

    标签: 模拟IC 性能 模拟 数字化设计

    上传时间: 2013-11-17

    上传用户:菁菁聆听

  • D类数字输入放大器的简化系统设计

    Abstract: This application note describes a new generation of digital-input Class D audio amplifiers that achieve high PSRRperformance, comparable to traditional analog Class D amplifiers. More importantly, these digital-input Class D amplifiersprovide additional benefits of reduced power, complexity, noise, and system cost.

    标签: 数字输入放大器 系统设计

    上传时间: 2013-12-20

    上传用户:JIUSHICHEN

  • 音频数模转换器DAC抖动的灵敏度分析

    Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.

    标签: DAC 音频 数模转换器 抖动

    上传时间: 2013-10-25

    上传用户:banyou