I2C(Inter Integrated Circuits)是Philips公司开发的用于芯片之间连接的串行总线，以其严格的规范、卓越的性能、简便的操作和众多带I2C接口的外围器件而得到广泛的应用并受到普遍的欢迎。 现场可编程门阵列(FPGA)设计灵活、速度快，在数字专用集成电路的设计中得到了广泛的应用。本论文主要讨论了如何利用Verilog/FPGA来实现一个随机读/写的I2C接口电路，实现与外围I2C接口器件E2PROM进行数据通信，实现读、写等功能，传输速率实现为100KBps。在Modelsim6.0仿真软件环境中进行仿真，在Xilinx公司的ISE9.li开发平台上进行了下载，搭建外围电路，用Agilem逻辑分析仪进行数据采集，分析测试结果。 首先，介绍了微电子设计的发展概况以及设计流程，重点介绍了HDL/FPGA的设计流程。其次，对I2C串行总线进行了介绍，重点说明了总线上的数据传输格式并对所使用的AT24C02 E2PROM存储器的读／写时序作了介绍。第三，基于Verilog _HDL设计了随机读/写的I2C接口电路、测试模块和显示电路；接口电路由同步有限状态机(FSM)来实现；测试模块首先将数据写入到AT24C02的指定地址，接着将写入的数据读出，并将两个数据显示在外围LED数码管和发光二极管上，从而直观地比较写入和输出的数据的正确性。FPGA下载芯片为Xilinx SPARTAN Ⅲ XC3S200。第四，用Agilent逻辑分析仪进行传输数据的采集，分析数据传输的时序，从而验证电路设计的正确性。最后，论文对所取得的研究成果进行了总结，并展望了下一步的工作。
上传时间： 2013-06-08
上传用户：再见大盘鸡
FPGA(Field Programmable Gate Arrays)是目前广泛使用的一种可编程器件，FPGA的出现使得ASIC(Application Specific Integrated Circuits)产品的上市周期大大缩短，并且节省了大量的开发成本。目前FPGA的功能越来越强大，满足了目前集成电路发展的新需求，但是其结构同益复杂，规模也越来越大，内部资源的种类也R益丰富，但同时也给测试带来了困难，FPGA的发展对测试的要求越来越高，对FPGA测试的研究也就显得异常重要。 本文的主要工作是提出一种开关盒布线资源的可测性设计，通过在FPGA内部加入一条移位寄存器链对开关盒进行配置编程，使得开关盒布线资源测试时间和测试成本减少了99％以上，而且所增加的芯片面积仅仅在5％左右，增加的逻辑资源对FPGA芯片的使用不会造成任何影响，这种方案采用了小规模电路进行了验证，取得了很好的结果，是一种可行的测试方案。 本文的另一工作是采用一种FPGA逻辑资源的测试算法对自主研发的FPGA芯片FDP250K的逻辑资源进行了严格、充分的测试，从FPGA最小的逻辑单元LC开始，首先得到一个LC的测试配置，再结合SLICE内部两个LC的连接关系得到一个SLICE逻辑单元的4种测试配置，并且采用阵列化的测试方案，同时测试芯片内部所有的逻辑单元，使得FPGA内部的逻辑资源得完全充分的测试，测试的故障覆盖率可达100％，测试配置由配套编程工具产生，测试取得了完满的结果。
上传时间： 2013-06-29
上传用户：Thuan
·[测试书籍]ESSENTIALS OF ELECTRONIC TESTING FOR DIGITAL, MEMORY AND MIXED-SIGNAL VLSI CIRCUITS
标签： nbsp ESSENTIALS ELECTRONIC DIGITAL
上传时间： 2013-07-21
上传用户：euroford
关于FPGA流水线设计的论文\r\nThis work investigates the use of very deep pipelines for\r\nimplementing circuits in FPGAs, where each pipeline\r\nstage is limited to a single FPGA logic element (LE). The\r\narchitecture and VHDL design of a parameterized integer\r\na
上传时间： 2013-09-03
上传用户：wl9454
Abstract: With the large number of analog switches on the market today, there are many performance criteria for a product designer to consider. This application note reviews the basic construction of
上传时间： 2013-11-09
上传用户：xiaohanhaowei
Abstract: This application note describes a new generation of digital-input Class D audio amplifiers that achieve high PSRRperformance, comparable to traditional analog Class D amplifiers. More importantly, these digital-input Class D amplifiersprovide additional benefits of reduced power, complexity, noise, and system cost.
上传时间： 2013-12-20
上传用户：JIUSHICHEN
Abstract: This application note describes the essential workings of an electrocardiogram (ECG). It discussesfactors that disrupt the ECG signals and make reliable, highly-accurate electrical characterization difficult. Theindustry-standard solution for ECG electrical characterization, which uses an analog front-end and ADCcombination, is explained. The article then introduces the MAX11040 simultaneous-sampling, sigma-deltaADC as a compelling, highly integrated solution that eliminates the need for the AFE, and saves both spaceand cost for the application.
上传时间： 2013-12-23
上传用户：sssl
Abstract: This tutorial discusses proper printed-circuit board (PCB) grounding for mixed-signal designs. Formost applications a simple method without cuts in the ground plane allows for successful PCB layouts withthis kind of IC. We begin this document with the basics: where the current flows. Later, we describe how toplace components and route signal traces to minimize problems with crosstalk. Finally, we move on toconsider power supply-currents and end by discussing how to extend what we have learned to circuits withmultiple mixed-signal ICs.
上传时间： 2013-11-04
上传用户：pol123
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上传时间： 2013-10-25
上传用户：banyou
The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.
上传时间： 2014-12-23
上传用户：变形金刚
