一篇关于TCP-Vegas的文献:Vegas is an implementation of TCP that achieves between 37 and 71％ better throughput on the Internet, with onefifth to one-half the losses, as compared to the implementation of TCP in the Reno distribution of BSD Unix. This paper motivates and describes the three key techniques employed by Vegas, and presents the results of a comprehensive experimental performance study—using both simulations and measurements on the Internet—of the Vegas and Reno implementations of TCP.
标签： implementation TCP-Vegas throughpu achieves
上传时间： 2014-01-08
上传用户：lwwhust
The MAX2691 low-noise amplifier (LNA) is designed forGPS L2 applications. Designed in Maxim’s advancedSiGe process, the device achieves high gain andlow noise figure while maximizing the input-referred 1dBcompression point and the 3rd-order intercept point. TheMAX2691 provides a high gain of 17.5dB and sub 1dBnoise figure.
标签： Amplifier Low-Noise 2691 Band
上传时间： 2014-12-04
上传用户：zaocan888
OPTOELECTRONICS CIRCUIT COLLECTION AVALANCHE PHOTODIODE BIAS SUPPLY 1Provides an output voltage of 0V to +80V for reverse biasingan avalanche photodiode to control its gain. This circuit canalso be reconfigured to supply a 0V to –80V output.LINEAR TEC DRIVER–1This is a bridge-tied load (BTL) linear amplifier for drivinga thermoelectric cooler (TEC). It operates on a single +5Vsupply and can drive ±2A into a common TEC.LINEAR TEC DRIVER–2This is very similar to DRIVER–1 but its power output stagewas modified to operate from a single +3.3V supply in orderto increase its efficiency. Driving this amplifier from astandard +2.5V referenced signal causes the output transistorsto have unequal power dissipation.LINEAR TEC DRIVER–3This BTL TEC driver power output stage achieves very highefficiency by swinging very close to its supply rails, ±2.5V.This driver can also drive ±2A into a common TEC. Operationis shown with the power output stage operating on±1.5V supplies. Under these conditions, this linear amplifiercan achieve very high efficiency. Application ReportThe following collection of analog circuits may be useful in electro-optics applications such as optical networkingsystems. This page summarizes their salient characteristics.
上传时间： 2013-10-27
上传用户：落花无痕
以C8051F020为核心处理器，设计无线传感器网络数据采集系统。系统采用SZ05-ADV型无线通讯模块组建Zigbee无线网络，结合嵌入式系统的软硬件技术，完成终端节点的8路传感器信号的数据采集。现场8路信号通过前端处理后，分别送入C8051F020的12位A/D转换器进行转换。经过精确处理、存储后的现场数据，通过Zigbee无线网络传送到上位机，系统可达到汽车试验中无线测试的目的。 Abstract: This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
标签： C8051F020 Zigbee 汽车测试 系统设计
上传时间： 2013-11-23
上传用户：dsgkjgkjg
为提高温度测量效率，降低系统的成本，扩展传输距离，设计出一种新型温度采集系统。单片机通过控制具有单总线方式的温度传感器DS18B20实现对温度的测量，同时单片机通过控制具有单总线方式300～450MHz频率范围内的MAX7044与MAX7033无线发射与接收芯片实现温度数据的无线传输。与传统温度采集系统相比，该系统利用单总线方式连接，采用无线传输方式实现远距离通信，易于系统的集成与扩展。实验结果表明，该系统结构简单、方便移植，能够同时实现多达上百点温度的测量与500m范围的传输。 Abstract: To improve the temperature measurement efficiency and reduce system cost,expansion of transmission distance,a new type of temperature acquisition system is designed.Microcontroller controlled temperature sensor DS18B20which has a single-bus achieves temperature measurement,while microcontroller by controlled the MAX7044and MAX7033chip with a single-bus and having300~450MHz radiofrequency to achieve the wireless transmission of temperature data.Compared with conventional temperature acquisition system,the system uses single-bus connected,and uses wireless transmission means to achieve long-distance communications,easy-to-system integration and expansion.The experimental results show that the system is simple,convenient transplantation,and can be implemented in as many as a hundred-point temperature measure-ment and the transmission range of500meters.
上传时间： 2013-10-29
上传用户：515414293
以89S52单片机和EP1C6Q240C8型FPGA为控制核心的多功能计数器，是由峰值检波、A/D转换、程控放大、比较整形、移相网络部分组成,可实现测量正弦信号的频率、周期和相位差的功能。多功能计数器采用等精度的测量方法，可实现频率为1Hz～10MHz、幅度为0.01～5Vrms的正弦信号的精确测频，以及频率为10Hz～100kHz、幅度为0.5～5Vrms的正弦信号精确测相。液晶显示器能够实时显示当前信号的频率、周期和相位差。该多功能计数器精度高，界面友好，实用性强。 Abstract: A multi-function counter，which uses89S52MCU and EP1C6Q240C8FPGA as a control core，consists of peak detector，A/D conversion，program-controlled amplification，compared shaping and phase-shifting network part.The counter measures the frequency，period and phase of sinusoidal signal.With the equal precision method,the multi-function counter achieves the precise frequency measurement of the sinusoidal signal which its frequency is from1Hz to10MHz，its amplitude is from0.01Vrms to5Vrms，as well as the accurate phase measurement of the sinusoidal signal which its frequency is from10Hz to100kHz，its amplitude is from0.5Vrms to5Vrms.The LCD monitor real-time displays the frequency，period and phase difference of current signal.The multi-function counter features high precision，friendly interface，and strong practical.
上传时间： 2013-11-15
上传用户：gy592333
基于幅移键控技术ASK（Amplitude-Shift Keying），以C8051F340单片机作为监测终端控制器，C8051F330D单片机作为探测节点控制器，采用半双工的通信方式，通过监控终端和探测节点的无线收发电路，实现数据的双向无线传输。收发电路采用直径为0.8 mm的漆包线自行绕制成圆形空心线圈天线，天线直径为（3.4±0.3）cm。试验表明，探测节点与监测终端的通信距离为24 cm，通过桥接方式，节点收发功率为102 mW时，节点间的通信距离可达20 cm。与传统无线收发模块相比，该无线收发电路在受体积、功耗、成本限制的场合有广阔的应用前景。 Abstract: Based on ASK technology and with the C8051F340 and C8051F330D MCU as the controller， using half-duplex communication mode， this paper achieves bi-directional data transfer. Transceiver circuit constituted by enameled wire which diameter is 0.8mm and wound into a diameter （3.4±0.3） cm circular hollow coil antenna. Tests show that the communication distance between detection and monitoring of the terminal is 24cm，the distance is up to 20cm between two nodes when using the manner of bridging and the node transceiver power is 102mW. Compared with the conventional wireless transceiver modules， the circuit has wide application prospect in small size， low cost and low power consumption and other characteristics.
上传时间： 2013-10-19
上传用户：xz85592677
为了扩大监控范围，提高资源利用率，降低系统成本，提出了一种多通道视频切换的解决方案。首先从视频信号分离出行场信号，然后根据行场信号由DSP和FPGA产生控制信号，控制多路视频通道之间的切换，从而实现让一个视频处理器同时监控不同场景。实验结果表明，该方案可以在视频监控告警系统中稳定、可靠地实现视频通道的切换。 Abstract: To expand the scope of monitoring， improve resource utilization， reduce system cost， a multiple video channels signal switching method is pointed out in this paper. First， horizontal sync signal and field sync signal from the video signal are separated， then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus， it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably， and is applied in the video monitoring warning system successfully.
上传时间： 2013-11-09
上传用户：不懂夜的黑
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-13
上传用户：瓦力瓦力hong
为了在CDMA系统中更好地应用QDPSK数字调制方式，在分析四相相对移相（QDPSK)信号调制解调原理的基础上，设计了一种QDPSK调制解调电路，它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上，进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中，测试结果表明，调制电路能正确选相，解调电路输出数据与QDPSK调制输入数据完全一致，达到了预期的设计要求。 Abstract: In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
上传时间： 2014-01-13
上传用户：qoovoop
