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Zero-Field

  • 基于CORDIC算法的高速ODDFS电路设计

    为了满足现代高速通信中频率快速转换的需求,基于坐标旋转数字计算(CORDIC,Coordinate Rotation Digital Computer)算法完成正交直接数字频率合成(ODDFS,Orthogonal Direct Digital Frequency Synthesizer)电路设计方案。采用MATLAB和Xilinx System Generator开发工具搭建电路的系统模型,通过现场可编程门阵列(FPGA,Field Programmable Gate Array)完成电路的寄存器传输级(RTL,Register Transfer Level)验证,仿真结果表明电路设计具有很高的有效性和可行性。

    标签: CORDIC ODDFS 算法 电路设计

    上传时间: 2013-11-09

    上传用户:hfnishi

  • 模拟IC性能的权衡 模拟到数字化设计的挑战

    Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.  

    标签: 模拟IC 性能 模拟 数字化设计

    上传时间: 2013-11-17

    上传用户:菁菁聆听

  • 时钟切换电路英文资料.

    With more and more multi-frequency clocks being used in today's chips, especially in the communications field, it is often necessary to switch the source of a clock line while the chip is running.

    标签: 时钟切换电路 英文

    上传时间: 2013-10-10

    上传用户:1214209695

  • 精密DAC和看门狗提高模拟输出安全

    Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and data-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to implement thisfunction.

    标签: DAC 精密 看门狗 模拟

    上传时间: 2013-10-17

    上传用户:sjb555

  • 数字集成电路设计Digital Integrated Circuit Design

      This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.

    标签: Integrated Digital Circuit Design

    上传时间: 2013-11-04

    上传用户:life840315

  • DAC技术用语 (D/A Converters Defini

    Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.

    标签: Converters Defini DAC

    上传时间: 2013-10-30

    上传用户:stvnash

  • ADC转换器技术用语 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    标签: Converter Defi ADC 转换器

    上传时间: 2013-11-12

    上传用户:pans0ul

  • 计算FR4上的差分阻抗(PDF)

    Calculation of the Differential Impedance of Tracks on FR4 substrates There is a discrepancy between calculated and measured values of impedance for differential transmission lineson FR4. This is especially noticeable in the case of surface microstrip configurations. The anomaly is shown tobe due to the nature of the substrate material. This needs to be considered as a layered structure of epoxy resinand glass fibre. Calculations, using Boundary Element field methods, show that the distribution of the electricfield within this layered structure determines the apparent dielectric constant and therefore affects theimpedance. Thus FR4 cannot be considered to be uniform dielectric when calculating differential impedance.

    标签: FR4 计算 差分阻抗

    上传时间: 2014-12-24

    上传用户:DE2542

  • 高性能DCDC控制器

    We provide complete power solutions with a full lineup of power managementproducts. This brochure provides an overview of our high performance DC/DC switching regulatorcontrollers for applications including datacom, telecom, industrial, automotive, medical, avionicsand control systems. We make power design easier with our industry-leading field applicationengineering support; a broad selection of demonstration boards with schematics, layout filesand parts lists; SwitcherCAD® software for simulation, application notes and comprehensivetechnical documentation.

    标签: DCDC 性能 控制器

    上传时间: 2013-10-15

    上传用户:lz4v4

  • 为您的FPGA选择合适的电源

    Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply considerations that an engineer must think through whendesigning a power supply for an FPGA.

    标签: FPGA 电源

    上传时间: 2013-11-12

    上传用户:金苑科技