并行计算中的PSRS算法 经试验在Red Hat下可以使用
上传时间： 2016-10-07
上传用户：frank1234
ubuntu教程。现在用ubuntu的人越来越多。上个教程给大家用用。个人感觉用ubuntu虽然没有red hat方便，但也不想red hat那样傻瓜。它需要你自己去安装各种各样的软件。这个过程就是学习的过程。
上传时间： 2014-01-20
上传用户：wuyuying
3D Statistical shape analysis by SHPARM method: code and paper. From the top group at UNC.
标签： Statistical analysis SHPARM method
上传时间： 2016-10-20
上传用户：wfl_yy
iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist
标签： VHDL c_control vhd control
上传时间： 2016-10-30
上传用户：woshiayin
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上传时间： 2013-12-13
上传用户：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上传时间： 2014-01-20
上传用户：三人用菜
The DSKs or eZdspTM LF2407 and the DMC1500 make up a table top motor development system which allows engineers and software developers to evaluate certain characteristics of the TMS320F240, TMS320F243, and TMS320LF2407 DSPs to determine if the processor meets the designers application requirements. Evaluators can create software to execute onboard or expand the system in a variety of ways.
标签： development eZdspTM system allow
上传时间： 2013-12-24
上传用户：zhuoying119
《Red Hat Linux 用户基础》，这本书是红帽学院官方指定教程，但是没有附答案。这个就是那本书的答案(官方的，绝对权威)，希望能对学习linux的同学有帮助。
上传时间： 2014-01-02
上传用户：ljt101007
英文 网络课件 Computer Networking: A Top Down Approach Featuring the Internet, 3rd edition. Jim Kurose, Keith Ross Addison-Wesley, July 2004.
标签： Networking Featuring Computer Approach
上传时间： 2014-07-24
上传用户：123啊
《Red Hat Enterprise Linux 5.0 Deployment Guide》，Linux系统管理员不可或缺的好书！
标签： Enterprise Deployment Guide Linux
上传时间： 2014-01-08
上传用户：moerwang
