TCS ECN Background & Key TermsTrust Issues with PCIe PlatformsTCS ECN DetailsTrusted Config Space and TCS TransactionsTrusted Config Access Mech (TCAM)Standard vs Trusted Config AccessNew Capability StructuresTCS Support in Root Ports, Switches, & BridgesTCS “Does not…” ListExample Trusted Computing PlatformRevisiting the Trust IssuesKey Takeaways/Call to ActionQuestions
标签： Configuration Trusted PCIe Spa
上传时间： 2013-11-21
上传用户：hsfei8
[PIC项目实战：基于PIC18].Advanced.PIC.Microcontroller.Projects.in.C
标签： PIC Microcontroller Advanced Projects
上传时间： 2013-11-21
上传用户：二驱蚊器
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上传时间： 2013-10-23
上传用户：copu
什么是JTAG 到底什么是JTAG呢？ JTAG(Joint Test Action Group)联合测试行动小组)是一种国际标准测试协议（IEEE 1149.1兼容），主要用于芯片内部测试。现在多数的高级器件都支持JTAG协议，如DSP、FPGA器件等。标准的JTAG接口是4线：TMS、 TCK、TDI、TDO，分别为模式选择、时钟、数据输入和数据输出线。 JTAG最初是用来对芯片进行测试的，基本原理是在器件内部定义一个TAP（Test Access Port�测试访问口）通过专用的JTAG测试工具对进行内部节点进行测试。JTAG测试允许多个器件通过JTAG接口串联在一起，形成一个JTAG链，能实现对各个器件分别测试。现在，JTAG接口还常用于实现ISP（In-System rogrammable�在线编程），对FLASH等器件进行编程。 JTAG编程方式是在线编程，传统生产流程中先对芯片进行预编程现再装到板上因此而改变，简化的流程为先固定器件到电路板上，再用JTAG编程，从而大大加快工程进度。JTAG接口可对PSD芯片内部的所有部件进行编程 JTAG的一些说明 通常所说的JTAG大致分两类，一类用于测试芯片的电气特性，检测芯片是否有问题；一类用于Debug；一般支持JTAG的CPU内都包含了这两个模块。 一个含有JTAG Debug接口模块的CPU，只要时钟正常，就可以通过JTAG接口访问CPU的内部寄存器和挂在CPU总线上的设备，如FLASH，RAM，SOC（比如4510B，44Box，AT91M系列）内置模块的寄存器，象UART，Timers，GPIO等等的寄存器。 上面说的只是JTAG接口所具备的能力，要使用这些功能，还需要软件的配合，具体实现的功能则由具体的软件决定。 例如下载程序到RAM功能。了解SOC的都知道，要使用外接的RAM，需要参照SOC DataSheet的寄存器说明，设置RAM的基地址，总线宽度，访问速度等等。有的SOC则还需要Remap，才能正常工作。运行Firmware时，这些设置由Firmware的初始化程序完成。但如果使用JTAG接口，相关的寄存器可能还处在上电值，甚至时错误值，RAM不能正常工作，所以下载必然要失败。要正常使用，先要想办法设置RAM。在ADW中，可以在Console窗口通过Let 命令设置，在AXD中可以在Console窗口通过Set命令设置。
上传时间： 2013-10-23
上传用户：aeiouetla
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
标签： Base-Station Applications Single-Chip Transceiver
上传时间： 2013-11-07
上传用户：songrui
针对高校实验教学的现状以及存在的问题，提出了基于Struts的网络实验教学平台。设计这样一个教学平台其主要目的也是在帮助学生完成对知识的建构，同时也必需要考虑相应的教学目标以及教学策略的运用。该平台采用C/S局域网，把实验教学系统放在服务器端，让学生通过浏览器来访问，软件使用MVC模式。平台整合了现有的实验资源，通过实验预约排课等模块辅助实验室管理员的日常管理工作，帮助实验教学顺利有效的开展，实现学生的个性化学习，实现以人为本的教育理念；同时促进了教育信息化的发展，有利于培养学生的综合素质。
上传时间： 2013-11-10
上传用户：zczc
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
标签： Base-Station Applications Single-Chip Transceiver
上传时间： 2013-11-05
上传用户：超凡大师
本程序集是Allen I. Holub所写的《Compiler Design in C》一书的附随软件，其中有作者自己编写的词法分析和语法分析工具LeX，occs和LLama，该软件包还包括一个显示C语言分析过程的程序
上传时间： 2014-01-08
上传用户：siguazgb
PGP Components使用PGP算法的加密控件。(有源代码）工作在：D2 D3 D4 D5。作者：Michael in der Wiesche
标签： Components PGP Michael Wiesche
上传时间： 2013-12-28
上传用户：koulian
a set of cross-platform tools that is useful for programming the GBA written in Java.
标签： cross-platform programming written useful
上传时间： 2015-01-06
上传用户：yd19890720
