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  • Phison MP2232 based usb controller development tool. Tweakand customize other settings of MP2232 bas

    Phison MP2232 based usb controller development tool. Tweakand customize other settings of MP2232 based USB Mass Storage device.

    标签: 2232 development controller customize

    上传时间: 2013-12-26

    上传用户:koulian

  • MPEG-4 标准文档 access to visual objects in natural and synthetic moving pictures and associated natura

    MPEG-4 标准文档 access to visual objects in natural and synthetic moving pictures and associated natural or synthetic sound for various applications such as digital Storage media, internet, various forms of wired or wireless communication etc. The use of ISO/IEC 14496 means that motion video can be manipulated as a form of computer data and can be stored on various Storage media, transmitted and received over existing and future networks and distributed on existing and future broadcast channels.

    标签: associated and synthetic pictures

    上传时间: 2017-04-15

    上传用户:TRIFCT

  • 2009.02.13 (Chiron.ylq) ------------------------------ 该工程用于Analog Devices VisualDSP++ V5.0开发环境

    2009.02.13 (Chiron.ylq) ------------------------------ 该工程用于Analog Devices VisualDSP++ V5.0开发环境下,烧写Silicon Storage Technology公司SST39VF512/010/020/040系列Flash的Program Load Driver。 1. 文件结构 SST39VFXXX.dlb SST39VF512/010/020/040 Flash操作驱动 BF533_SST_Flash_Driver.c VisualDSP++ v5.0 flash load driver Uart.c 串口驱动,用于打印调试信息 2. 程序信息 ① NUM_SECTORS (BF533_SST_Flash_Driver.c) 参数在使用前必须正确定义宏SST_FLASH_TYPE (SST39VFXXX.h)以确保正确使用。 ② DEBUG (BF533_SST_Flash_Driver.c) 用于开启debug功能,当定义DEBUG为1后,可以利用全局字符数组char cDebug[100],打印调试信息,信息从串口(115200,N,8,1)打出。 #if DEBUG == 1 sprintf(cDebug, "ulStart = d, lCount = d, lStride = d, pnData = 0x x.\r\n", ulStart, lCount, lStride, pnData) UART_TX(cDebug, strlen(cDebug)) return NO_ERR #endif

    标签: VisualDSP Devices Chiron Analog

    上传时间: 2013-12-22

    上传用户:lixinxiang

  • Professional Android Application Development,英文,内容详尽,适合进阶 Chapter 1: Hello, Android . . . . . . . .

    Professional Android Application Development,英文,内容详尽,适合进阶 Chapter 1: Hello, Android . . . . . . . . . . . . . . . . . . . . .. . Chapter 2: Getting Started . . . . . . . . . . . . . . . . . . . .. . Chapter 3: Creating Applications and Activities . . . . . . . . . . . Chapter 4: Creating User Interfaces . . . . . . . . . . . . . . . .. . Chapter 5: Intents, Broadcast Receivers, Adapters, and the Internet113 Chapter 6: Data Storage, Retrieval, and Sharing . . . . . . . . . .. . Chapter 7: Maps, Geocoding, and Location-Based Services . . . . . .. Chapter 8: Working in the Background . . . . . . . . . . . . . . . . . Chapter 9: Peer-to-Peer Communication . . . . . . . . . . . . . . .. . Chapter 10: Accessing Android Hardware . . . . . . . . . . . . . . . . Chapter 11: Advanced Android Development . . . . . . . . . . . . .. . Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    标签: Android Professional Application Development

    上传时间: 2013-12-12

    上传用户:aig85

  • H.264/AVC is the current video standardization project of the ITU-T Video Coding Experts Group (VCE

    H.264/AVC is the current video standardization project of the ITU-T Video Coding Experts Group (VCEG) and the ISO/IEC Moving Picture Experts Group (MPEG). The main goals of this standardization effort are to develop a simple and straightforward video coding design, with enhanced compression performance, and to provide a 鈥渘etwork-friendly鈥?video representation which addresses 鈥渃onversational鈥?(video telephony) and 鈥渘on-conversational鈥?(Storage, broadcast or streaming) applications.

    标签: standardization the current Experts

    上传时间: 2014-01-02

    上传用户:SimonQQ

  • MARKET ANALYSIS World wide Hard Disk Drive 2008-– 2012 Forecast and Analysis : Shrugging Off St

    MARKET ANALYSIS World wide Hard Disk Drive 2008-– 2012 Forecast and Analysis : Shrugging Off Storage Technology Challengers

    标签: Shrugging ANALYSIS Analysis Forecast

    上传时间: 2017-06-05

    上传用户:yyyyyyyyyy

  • The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains

    The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains a 16-bit RISC processor with built in SL11RIDE ROM to greatly reduce firmware development efforts. Its serial flash EEPROM interface offers low cost Storage for USB device configuration and customer product specific functions. New functions can be programmed into the I2C by downloading it from a USB Host PC. This unique architecture provides the ability to upgrade products, in the field, without changing the peripheral hardware.

    标签: Controller Universal contains Serial

    上传时间: 2014-01-06

    上传用户:15071087253

  • LIST p=16F84 PIC16F844 is the target processor #include "P16F84.INC" Include

    LIST p=16F84 PIC16F844 is the target processor #include "P16F84.INC" Include header file CBLOCK 0x10 Temporary Storage tempo tptrl tptrh note length pitch temp dl1 dl2 ENDC

    标签: processor 16 Include include

    上传时间: 2017-07-09

    上传用户:gxrui1991

  • CFE contains the following important features: * Easy to port to new SB1250/BCM1480 designs

    CFE contains the following important features: * Easy to port to new SB1250/BCM1480 designs * Initializes CPUs, caches, memory controllers, and peripherals * Built-in device drivers for SB1250 SOC peripherals * Several console choices, including serial ports, ROM emulators, JTAG, etc. * Environment Storage in NV EEPROM, flash, etc. * Supports big or little endian operation * Supports 32-bit and 64-bit processors * Support for network bootstrap. Network protocols supported include IP,ARP,ICMP,UDP,DHCP,TFTP. * Support for disk bootstrap. * Provides an external API for boot loaders and startup programs * Simple user interface. UI is easy to remove for embedded apps.

    标签: following important contains features

    上传时间: 2014-11-23

    上传用户:龙飞艇

  • RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the

    RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in Storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.

    标签: using fundamental the RS_latch

    上传时间: 2017-07-30

    上传用户:努力努力再努力