虫虫首页| 资源下载| 资源专辑| 精品软件
登录| 注册

Step-Up

  • 单片机外围线路设计

    当拿到一张CASE单时,首先得确定的是能用什么母体才能实现此功能,然后才能展开对外围硬件电路的设计,因此首先得了解每个母体的基本功能及特点,下面大至的介绍一下本公司常用的IC:单芯片解决方案• SN8P1900 系列–  高精度 16-Bit  模数转换器–  可编程运算放大器 (PGIA)•  信号放大低漂移: 2V•  放大倍数可编程: 1/16/64/128  倍–  升压- 稳压调节器 (Charge-Pump Regulator)•  电源输入: 2.4V ~ 5V•  稳压输出: e.g. 3.8V at SN8P1909–  内置液晶驱动电路 (LCD Driver)–  单芯片解决方案 •  耳温枪  SN8P1909 LQFP 80 Pins• 5000 解析度量测器 SN8P1908 LQFP 64 Pins•  体重计  SN8P1907 SSOP 48 Pins单芯片解决方案• SN8P1820 系列–  精确的12-Bit  模数转换器–  可编程运算放大器 (PGIA)• Gain Stage One: Low Offset 5V, Gain: 16/32/64/128• Gain Stage One: Low Offset 2mV, Gain: 1.3 ~ 2.5–  升压- 稳压调节器•  电源输入: 2.4V ~ 5V•  稳压输出: e.g. 3.8V at SN8P1829–  内置可编程运算放大电路–  内置液晶驱动电路 –  单芯片解决方案 •  电子医疗器 SN8P1829 LQFP 80 Pins 高速/低功耗/高可靠性微控制器• 最新SN8P2000 系列– SN8P2500/2600/2700 系列– 高度抗交流杂讯能力• 标准瞬间电压脉冲群测试 (EFT): IEC 1000-4-4• 杂讯直接灌入芯片电源输入端• 只需添加1颗 2.2F/50V 旁路电容• 测试指标稳超 4000V (欧规)– 高可靠性复位电路保证系统正常运行• 支持外部复位和内部上电复位• 内置1.8V 低电压侦测可靠复位电路• 内置看门狗计时器保证程序跳飞可靠复位– 高抗静电/栓锁效应能力– 芯片工作温度有所提高: -200C ~ 700C     工规芯片温度: -400C ~ 850C 高速/低功耗/高可靠性微控制器• 最新 SN8P2000 系列– SN8P2500/2600/2700 系列– 1T  精简指令级结构• 1T:  一个外部振荡周期执行一条指令•  工作速度可达16 MIPS / 16 MHz Crystal–  工作消耗电流 < 2mA at 1-MIPS/5V–  睡眠模式下消耗电流 < 1A / 5V额外功能• 高速脉宽调制输出 (PWM)– 8-Bit PWM up to 23 KHz at 12 MHz System Clock– 6-Bit PWM up to 93 KHz  at 12 MHz System Clock– 4-Bit PWM up to 375 KHz  at 12 MHz System Clock• 内置高速16 MHz RC振荡器 (SN8P2501A)• 电压变化唤醒功能• 可编程控制沿触发/中断功能– 上升沿 / 下降沿 / 双沿触发• 串行编程接口

    标签: 单片机 线路设计

    上传时间: 2013-10-21

    上传用户:jiahao131

  • 全遥控6声道AV机的汇编程序

    全遥控6声道AV机的汇编程序:;;;;;;;;;;;;;;;;;;;6CH AMPLIFIER;;;;;;;;;;;;;;;;;----脚位定义-----;;;;;;;;;;;;;;;;;;;6CH AMPLIFIER;;;;;;;;;;;;;;;;;----脚位定义----- PT6311_CLK      EQU   P3.4PT6311_STB      EQU   P3.5PT6311_DATA     EQU   P3.3 UP              EQU   P3.1DOEN            EQU   P3.0 PT2313_DATA     EQU   P0.7PT2313_CLK      EQU   P2.7 AC3             EQU   P2.6        ;(控制4053的信号) M62429_DA       EQU   P2.3        ;(SURL/R)M62429_CK       EQU   P2.4 M62429_CK1      EQU   P2.5        ;(C/BW) M62429_CK3      EQU   P0.0        ;(ECHO,MVOL)M62429_DA3      EQU   P1.7M_DELAY1        EQU   P0.1M_DELAY2        EQU   P0.2 AD_OUT          BIT   P0.5AD_IN           BIT   P0.6 ;----片内RAM定义--------GIF_SIGN        EQU   40H         ; 动画进程标记(=1,走过场字幕  )GIF_TIME1       EQU   41H         ; 动画跑字的时间间隔速度GIF_LONG        EQU   42H         ; 动画字幕的长度 DISP_BUFFER     EQU   43H         ; 显示缓冲区地址指针DISP_INDEX      EQU   44H         ; PT6311片内地址指针

    标签: 遥控 声道 汇编程序

    上传时间: 2013-10-19

    上传用户:fac1003

  • MCU复位电路和振荡电路应用

    系统start-up 定时器• 为了让振荡器能够稳定起振所需要的延时时间。• 其时间为1024 个振荡器振荡周期。制程和温度漂移• 因RC 振荡器的频率与内建振荡电容值有关,而此电容值与制程参数有关,所以不同的MCU 会表现出不一致性。在固定电压和温度下,振荡频率漂移范围约±25%。• 对于同一颗MCU(与制程漂移无关),其振荡频率会对工作电压和工作温度产生漂移。其对工作电压和工作温度所产生的漂移,可参考HOLTEK 网站上提供的相关资料。EMI/EMS(EMC)注意事项• ROSC 位置应尽量接近OSC1 引脚,其至OSC1 的连线应最短。• CS 可以提高振荡器的抗干扰能力,其与MCU OSC1 和GND 的连线应最短。• RPU 在确定系统频率之后,量产时建议不要接,因为其fSYS/4 频率输出会干扰到OSC1

    标签: MCU 复位电路 振荡电路

    上传时间: 2014-01-20

    上传用户:yyyyyyyyyy

  • 看门狗复位芯片

    典型的MCU/DSP/UP复位电源监控,外部看门狗专用电路。

    标签: 看门狗 复位芯片

    上传时间: 2013-10-11

    上传用户:LANCE

  • 51单片机驱动步进电机(含电路图和C语言源程序代码)

    51单片机驱动步进电机(含电路图和源程序代码) 源程序:stepper.c stepper.hex /* * STEPPER.C * sweeping stepper's rotor cw and cww 400 steps * Copyright (c) 1999 by W.Sirichote */ #i nclude c:\mc5151io.h /* include i/o header file */ #i nclude c:\mc5151reg.h register unsigned char j,flag1,temp; register unsigned int cw_n,ccw_n; unsigned char step[8]={0x80,0xc0,0x40,0x60,0x20,0x30,0x10,0x90} #define n 400 /* flag1 mask byte 0x01 run cw() 0x02 run ccw() */

    标签: 51单片机 驱动 步进电机 C语言

    上传时间: 2013-11-09

    上传用户:钓鳌牧马

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    标签: Adapter Serial 2303 USB

    上传时间: 2013-11-01

    上传用户:ghostparker

  • 使用CCS进行DSP编程

    CCStudio Platinum Edition is available in a number of ways. Existingcustomers who are up-to-date with their subscription service withTexas Instruments will receive their update automatically on a CD inthe mail. New customers who wish to purchase a copy of CCStudioPlatinum Edition can order TMDSCCSALL-1 starting May 23, 2005. A120-day Trial version will be also be available on CDROM startingJuly 11, 2005. Users may order the CDROM of the 120-day free copy

    标签: CCS DSP 编程

    上传时间: 2014-12-28

    上传用户:gououo

  • Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

      中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    标签: UltraScale Xilinx 架构

    上传时间: 2013-11-13

    上传用户:瓦力瓦力hong

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    标签: Solutions Analog Xilinx FPGAs

    上传时间: 2013-11-01

    上传用户:a67818601

  • Analog Solutions for Altera FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)

    标签: Solutions Analog Altera FPGAs

    上传时间: 2013-11-08

    上传用户:虫虫虫虫虫虫