GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interface
标签： microprocessor programmable tri-state General
上传时间： 2017-06-13
上传用户：hxy200501
Jh_cpu is a cpu with 12 address,8 data bus, adn give direct address ,indirect address two addressin way.
标签： address addressin indirect Jh_cpu
上传时间： 2017-06-14
上传用户：bakdesec
LLRF CONTROL SYSTEM USING A COMMERCIAL BOARD for PCI BUS capture date
标签： COMMERCIAL CONTROL capture SYSTEM
上传时间： 2013-12-16
上传用户：CHENKAI
The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains a 16-bit RISC processor with built in SL11RIDE ROM to greatly reduce firmware development efforts. Its serial flash EEPROM interface offers low cost storage for USB device configuration and customer product specific functions. New functions can be programmed into the I2C by downloading it from a USB Host PC. This unique architecture provides the ability to upgrade products, in the field, without changing the peripheral hardware.
标签： Controller Universal contains Serial
上传时间： 2014-01-06
上传用户：15071087253
This file contains routines to write to and read from the I2C bus using the GPIO pins of the CS5530.
标签： the contains routines write
上传时间： 2014-01-21
上传用户：zaizaibang
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
标签： Tensilica OpenCores interface the
上传时间： 2013-12-21
上传用户：gonuiln
pci pci转local bus总线的应用，使用IPcore alter器件
上传时间： 2013-12-28
上传用户：二驱蚊器
Meter Bus protocol specification
标签： specification protocol Meter Bus
上传时间： 2013-12-20
上传用户：lacsx
this is a vhdl code for a bus
上传时间： 2017-07-05
上传用户：咔乐坞
pci description.the entire details regarding the pci bus
标签： description pci the regarding
上传时间： 2017-07-14
上传用户：Yukiseop
