针对51单片机系统中常用的A/D转换器价格高、精度低的缺点，介绍TI公司的16 位的带有I2C串行接口的A/D转换器ADS1110的工作原理，给出ADS1110与AT89C51单片机系统的接口电路和软件设计。实践证明，ADS1110具有高性价比和实用性。 Abstract: According to the disadvantages of high expense and low accuracy of the general A/D converter used in MCS51 microchip system,the principle and working PROCESS of a high accuracy 16-bit A/D conversion ADS1110 which has I2C bus and belongs to TI Company are proposed here as well as the interface of ADS1110 to AT89C51 and software list.It is proved to be high performance index and practicability.
上传时间： 2013-11-21
上传用户：gyq
在介绍基于MSP430单片机的指纹保险柜工作原理的基础上，从系统软件设计的角度出发，详细介绍了指纹保险柜软件的总体分析过程、程序结构的设计以及代码的编写，给出了按键管理流程和部分源代码。 Abstract: On basis of the operating principle of MSP430 microcontroller-based fingerprint safe,the general analyzing PROCESS,program designing and code compiling of the fingerprint safe software are introduced mainly,and the key-press flows chart and some codes according to the system software designing are put forward.
上传时间： 2014-12-27
上传用户：gaojiao1999
为了在工业生产及过程控制中准确测量温度，设计了一种基于低功耗MSP430单片机的数字温度计。整个系统通过单片机MSP430F1121A控制DS18B20读取温度，采用数码管显示，温度传感器DS18B20与单片机之间通过串口进行数据传输。MSP430系列单片机具有超低功耗，且外围的整合性高，DS18B20只需一个端口即可实现数据通信，连接方便。通过多次实验证明，该系统的测试结果与实际环境温度一致，除了具有接口电路简单、测量精度高、误差小、可靠性高等特点外，其低成本、低功耗的特点使其拥有更广阔的应用前景。 Abstract: In order to obtain accurate measuring temperature in industrial production and PROCESS control， a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20， and gets the temperature data， which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration， DS18B20 only needs one port to achieve data communication. Through many experimental results prove， this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple， high measuring accuracy， minor error， high reliability， besides， the characteristics of low cost and low power make it having vaster application prospect.
上传时间： 2013-10-16
上传用户：wettetw
本文介绍了基于AT89C52 单片机的自动水温控制系统的设计及实现过程。该系统具有实时显示、温度测量、温度设定并能根据设定值对环境温度进行调节实现控温的目的以及达到上下限温度报警功能，控制算法是基于数字PID 算法。关键词 ：PID AT89C52 脉宽调制 实时 Abstract ： This article describes AT89C52 single-chip microcomputer-basedautomatic water temperature control system design and implementation PROCESS. Thesystem has real-time display, temperature measurement, temperature settings and theenvironment in accordance with the temperature settings adjusted to achieve thepurpose of temperature control and reach the upper and lower limits of temperaturealarm function, the control algorithm is based on the digital PID algorithm.Keyword: PID AT89C52 PWM real time
上传时间： 2013-10-10
上传用户：归海惜雪
汇编器在微处理器的验证和应用中举足轻重，如何设计通用的汇编器一直是研究的热点之一。本文提出了一种开放式的汇编器系统设计思想，在汇编语言与机器语言间插入中间代码CMDL（code mapping description language）语言，打破汇编语言与机器语言的直接映射关系，由此建立起一套描述汇编语言与机器语言的开放式映射体系。基于此开放式映射体系开发了一套汇编器系统，具有较高层次上的通用性和可移植性。【关键词】指令集，CMDL，汇编器，开放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microPROCESSor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the PROCESS of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【关键词】instruction set, symbol table, assembler, lexical analysis, retargetability
上传时间： 2013-10-10
上传用户：meiguiweishi
The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot PROCESS has completed.
标签： Stellaris Clocking Options for
上传时间： 2013-10-14
上传用户：pol123
基于PIC单片机的脉冲电源:设计了一种金属凝固过程用脉冲电源。该电源采用PIC16F877作为主控芯片，实现对窄脉冲电流幅值的检测，以及时电流脉冲幅值根据模糊PID算法进行闲环控制。使用结果表明：该电源的输出脉冲波形良好，电流幅值稳定，满足合金材料凝固过程的工艺要求且运行稳定可靠。关键词：脉冲电源；PIC16F877单片机；模糊PID；闲环控制 Abstract：A kind of pulse power supply was designed which uses in the metal solidification PROCESS ．．I11is power supply used PIC16F877 to take the master control chip reali on to the narrow pulse electric current peak-to-peak value examination，carried on the closed-loop control to the electric current pulse peak-to-peak value basis fuzzy PID algorithm．The use result indicated ，this power supply output se profile is good，and the electric current peak-to-p~k value is stable，It satisfies the alloy material solidification PROCESS the technological requirement and movement stable reliable，Key words：p se po wer supply；PIC16F877single-chip microcontroller；f r PID；closed-loop control
上传时间： 2013-10-27
上传用户：xcy122677
针对使用硬件描述语言进行设计存在的问题，提出一种基于FPGA并采用DSP Builder作为设计工具的数字信号处理器设计方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ设计流程，设计了一个12阶FIR 低通数字滤波器，通过Quartus 时序仿真及嵌入式逻辑分析仪SignalTapⅡ硬件测试对设计进行了验证。结果表明，所设计的FIR 滤波器功能正确，性能良好。 Abstract: Aiming at the problems in designing DSP using HDL，a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the PROCESS of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
上传时间： 2013-11-17
上传用户：lo25643
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one PROCESS generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-13
上传用户：瓦力瓦力hong
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in PROCESS automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include PROCESS automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System
上传时间： 2013-11-05
上传用户：维子哥哥
