Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. It introduces the reader to various kinds of jitter in high-speed systems, their causes and their effects, and methods of reducing jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
标签： extremely PLL-based important drivers
上传时间： 2014-11-25
上传用户：asddsd
Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout.
标签： Semiconductor application generators PLL-based
上传时间： 2013-12-20
上传用户：水中浮云
Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) products use crystal oscillators to generate areference for the phase-locked loop (PLL)-based local oscillator (LO). This tutorial provides a basic description of theISM-RF Crystal Calculator, which can be used to calculate various impacts on crystal frequency accuracy and startupmargin for such an LO.
上传时间： 2013-11-15
上传用户：JasonC
PLL电路
上传时间： 2013-08-01
上传用户：eeworm
专辑类-可编程逻辑器件相关专辑-96册-1.77G PLL电路-3.8M.zip
上传时间： 2013-06-09
上传用户：bcjtao
锁相环PLL原理与应用教程，讲的通俗易懂
上传时间： 2013-07-12
上传用户：lijinchuan
PLL芯片MB1504编程参考（汇编）PLL芯片MB1504编程参考（汇编）PLL芯片MB1504编程参考（汇编）PLL芯片MB1504编程参考（汇编）
上传时间： 2013-07-12
上传用户：wyaqy
资料->【E】光盘论文->【E1】斯坦福博士论文->02 calgary PhD A Java-Based Wireless Framework for Location-Based Services Applications.pdf
标签： Location-Based Applications Java-Based Framework
上传时间： 2013-07-02
上传用户：亚亚娟娟123
FPGA-based high-order FIR filter design
标签： FPGA-based high-order filter design
上传时间： 2013-08-06
上传用户：sssnaxie
基于FPGA和PLL的函数信号发生器时钟部分的实现
上传时间： 2013-08-08
上传用户：xzt
