某公司的内部PCB设计规范,PDF文件,LAYOUT的朋友有兴趣可以
上传时间： 2014-09-10
上传用户：hphh
大众电脑有限公司的PCB设计规范,LAYOUT人员可以做参考
上传时间： 2016-04-08
上传用户：ayfeixiao
PADS2005 WORK IN LAYOUT PCB
上传时间： 2013-12-19
上传用户：bcjtao
PADS2005 WORK IN LAYOUT PCB
上传时间： 2016-10-10
上传用户：英雄
PADS2005 WORK IN LAYOUT PCB
上传时间： 2014-07-27
上传用户：guanliya
PADS2005 WORK IN LAYOUT PCB
上传时间： 2013-12-24
上传用户：坏天使kk
8层板pcb文件,可以拿来学习一下layout.
上传时间： 2013-12-25
上传用户：BIBI
top layout pcb for inverter
上传时间： 2017-03-29
上传用户：缥缈
第一部分 信号完整性知识基础.................................................................................5第一章 高速数字电路概述.....................................................................................51.1 何为高速电路...............................................................................................51.2 高速带来的问题及设计流程剖析...............................................................61.3 相关的一些基本概念...................................................................................8第二章 传输线理论...............................................................................................122.1 分布式系统和集总电路.............................................................................122.2 传输线的RLCG 模型和电报方程...............................................................132.3 传输线的特征阻抗.....................................................................................142.3.1 特性阻抗的本质.................................................................................142.3.2 特征阻抗相关计算.............................................................................152.3.3 特性阻抗对信号完整性的影响.........................................................172.4 传输线电报方程及推导.............................................................................182.5 趋肤效应和集束效应.................................................................................232.6 信号的反射.................................................................................................252.6.1 反射机理和电报方程.........................................................................252.6.2 反射导致信号的失真问题.................................................................302.6.2.1 过冲和下冲.....................................................................................302.6.2.2 振荡：.............................................................................................312.6.3 反射的抑制和匹配.............................................................................342.6.3.1 串行匹配.........................................................................................352.6.3.1 并行匹配.........................................................................................362.6.3.3 差分线的匹配.................................................................................392.6.3.4 多负载的匹配.................................................................................41第三章 串扰的分析...............................................................................................423.1 串扰的基本概念.........................................................................................423.2 前向串扰和后向串扰.................................................................................433.3 后向串扰的反射.........................................................................................463.4 后向串扰的饱和.........................................................................................463.5 共模和差模电流对串扰的影响.................................................................483.6 连接器的串扰问题.....................................................................................513.7 串扰的具体计算.........................................................................................543.8 避免串扰的措施.........................................................................................57第四章 EMI 抑制....................................................................................................604.1 EMI/EMC 的基本概念..................................................................................604.2 EMI 的产生..................................................................................................614.2.1 电压瞬变.............................................................................................614.2.2 信号的回流.........................................................................................624.2.3 共模和差摸EMI ..................................................................................634.3 EMI 的控制..................................................................................................654.3.1 屏蔽.....................................................................................................654.3.1.1 电场屏蔽.........................................................................................654.3.1.2 磁场屏蔽.........................................................................................674.3.1.3 电磁场屏蔽.....................................................................................674.3.1.4 电磁屏蔽体和屏蔽效率.................................................................684.3.2 滤波.....................................................................................................714.3.2.1 去耦电容.........................................................................................714.3.2.3 磁性元件.........................................................................................734.3.3 接地.....................................................................................................744.4 PCB 设计中的EMI.......................................................................................754.4.1 传输线RLC 参数和EMI ........................................................................764.4.2 叠层设计抑制EMI ..............................................................................774.4.3 电容和接地过孔对回流的作用.........................................................784.4.4 布局和走线规则.................................................................................79第五章 电源完整性理论基础...............................................................................825.1 电源噪声的起因及危害.............................................................................825.2 电源阻抗设计.............................................................................................855.3 同步开关噪声分析.....................................................................................875.3.1 芯片内部开关噪声.............................................................................885.3.2 芯片外部开关噪声.............................................................................895.3.3 等效电感衡量SSN ..............................................................................905.4 旁路电容的特性和应用.............................................................................925.4.1 电容的频率特性.................................................................................935.4.3 电容的介质和封装影响.....................................................................955.4.3 电容并联特性及反谐振.....................................................................955.4.4 如何选择电容.....................................................................................975.4.5 电容的摆放及Layout ........................................................................99第六章 系统时序.................................................................................................1006.1 普通时序系统...........................................................................................1006.1.1 时序参数的确定...............................................................................1016.1.2 时序约束条件...................................................................................1063.2 高速设计的问题.......................................................................................2093.3 SPECCTRAQuest SI Expert 的组件.......................................................2103.3.1 SPECCTRAQuest Model Integrity .................................................2103.3.2 SPECCTRAQuest Floorplanner/Editor .........................................2153.3.3 Constraint Manager .......................................................................2163.3.4 SigXplorer Expert Topology Development Environment .......2233.3.5 SigNoise 仿真子系统......................................................................2253.3.6 EMControl .........................................................................................2303.3.7 SPECCTRA Expert 自动布线器.......................................................2303.4 高速设计的大致流程...............................................................................2303.4.1 拓扑结构的探索...............................................................................2313.4.2 空间解决方案的探索.......................................................................2313.4.3 使用拓扑模板驱动设计...................................................................2313.4.4 时序驱动布局...................................................................................2323.4.5 以约束条件驱动设计.......................................................................2323.4.6 设计后分析.......................................................................................233第四章 SPECCTRAQUEST SIGNAL EXPLORER 的进阶运用..........................................2344.1 SPECCTRAQuest Signal Explorer 的功能包括：................................2344.2 图形化的拓扑结构探索...........................................................................2344.3 全面的信号完整性(Signal Integrity)分析.......................................2344.4 完全兼容 IBIS 模型...............................................................................2344.5 PCB 设计前和设计的拓扑结构提取.......................................................2354.6 仿真设置顾问...........................................................................................2354.7 改变设计的管理.......................................................................................2354.8 关键技术特点...........................................................................................2364.8.1 拓扑结构探索...................................................................................2364.8.2 SigWave 波形显示器........................................................................2364.8.3 集成化的在线分析(Integration and In-process Analysis) .236第五章 部分特殊的运用...............................................................................2375.1 Script 指令的使用..................................................................................2375.2 差分信号的仿真.......................................................................................2435.3 眼图模式的使用.......................................................................................249第四部分：HYPERLYNX 仿真工具使用指南............................................................251第一章 使用LINESIM 进行前仿真.......................................................................2511.1 用LineSim 进行仿真工作的基本方法...................................................2511.2 处理信号完整性原理图的具体问题.......................................................2591.3 在LineSim 中如何对传输线进行设置...................................................2601.4 在LineSim 中模拟IC 元件.....................................................................2631.5 在LineSim 中进行串扰仿真...................................................................268第二章 使用BOARDSIM 进行后仿真......................................................................2732.1 用BOARDSIM 进行后仿真工作的基本方法...................................................2732.2 BoardSim 的进一步介绍..........................................................................2922.3 BoardSim 中的串扰仿真..........................................................................309
上传时间： 2014-04-18
上传用户：wpt
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
