One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
上传时间： 2013-11-01
上传用户：xzt
The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.
标签： 通信
上传时间： 2013-11-11
上传用户：xy@1314
One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.
标签： Synplicity Machine Verilog Design
上传时间： 2013-10-20
上传用户：苍山观海
本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
标签： Verilog verilog System VHDL
上传时间： 2014-03-03
上传用户：zhtzht
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
上传时间： 2013-10-22
上传用户：lmq0059
波长信号的解调是实现光纤光栅传感网络的关键，基于现有的光纤光栅传感器解调方法，提出一种基于FPGA的双匹配光纤光栅解调方法，此系统是一种高速率、高精度、低成本的解调系统，并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计，综合考虑系统的解调精度和FPGA的处理速度给出了基于拉格朗日的曲线拟合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
上传时间： 2013-10-10
上传用户：zxc23456789
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
标签： Transceiver Virtex Wizar GTP
上传时间： 2013-10-20
上传用户：dave520l
PCB 被动组件的隐藏特性解析 传统上，EMC一直被视为「黑色魔术（black magic）」。其实，EMC是可以藉由数学公式来理解的。不过，纵使有数学分析方法可以利用，但那些数学方程式对实际的EMC电路设计而言，仍然太过复杂了。幸运的是，在大多数的实务工作中，工程师并不需要完全理解那些复杂的数学公式和存在于EMC规范中的学理依据，只要藉由简单的数学模型，就能够明白要如何达到EMC的要求。本文藉由简单的数学公式和电磁理论，来说明在印刷电路板（PCB）上被动组件（passivecomponent）的隐藏行为和特性，这些都是工程师想让所设计的电子产品通过EMC标准时，事先所必须具备的基本知识。导线和PCB走线导线（wire）、走线（trace）、固定架……等看似不起眼的组件，却经常成为射频能量的最佳发射器（亦即，EMI的来源）。每一种组件都具有电感，这包含硅芯片的焊线（bond wire）、以及电阻、电容、电感的接脚。每根导线或走线都包含有隐藏的寄生电容和电感。这些寄生性组件会影响导线的阻抗大小，而且对频率很敏感。依据LC 的值（决定自共振频率）和PCB走线的长度，在某组件和PCB走线之间，可以产生自共振（self-resonance），因此，形成一根有效率的辐射天线。在低频时，导线大致上只具有电阻的特性。但在高频时，导线就具有电感的特性。因为变成高频后，会造成阻抗大小的变化，进而改变导线或PCB 走线与接地之间的EMC 设计，这时必需使用接地面（ground plane）和接地网格（ground grid）。导线和PCB 走线的最主要差别只在于，导线是圆形的，走线是长方形的。导线或走线的阻抗包含电阻R和感抗XL = 2πfL，在高频时，此阻抗定义为Z = R + j XL j2πfL，没有容抗Xc = 1/2πfC存在。频率高于100 kHz以上时，感抗大于电阻，此时导线或走线不再是低电阻的连接线，而是电感。一般而言，在音频以上工作的导线或走线应该视为电感，不能再看成电阻，而且可以是射频天线。
上传时间： 2013-11-16
上传用户：极客
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
上传时间： 2013-12-25
上传用户：jkhjkh1982
用途：测量地磁方向，测量物体静止时候的方向，测量传感器周围磁力线的方向。注意，测量地磁时候容易受到周围磁场影响，主芯片HMC5883 三轴磁阻传感器特点（抄自网上）： 1，数字量输出：I2C 数字量输出接口，设计使用非常方便。 2，尺寸小: 3x3x0.9mm LCC 封装，适合大规模量产使用。 3，精度高：1－2 度，内置12 位A/D,OFFSET, SET/RESET 电路，不会出现磁饱和现象，不会有累加误差。 4，支持自动校准程序，简化使用步骤，终端产品使用非常方便。 5，内置自测试电路，方便量产测试，无需增加额外昂贵的测试设备。 6，功耗低：供电电压1.8V, 功耗睡眠模式-2.5uA 测量模式-0.6mA 连接方法： 只要连接VCC，GND，SDA，SDL 四条线。 Arduino GND -> HMC5883L GND Arduino 3.3V -> HMC5883L VCC Arduino A4 (SDA) -> HMC5883L SDA Arduino A5 (SCL) -> HMC5883L SCL (注意，接线是A4，A5，不是D4,D5) 源程序： #include <Wire.h> #include <HMC5883L.h> HMC5883Lcompass; voidsetup() { Serial.begin(9600); Wire.begin(); compass = HMC5883L(); compass.SetScale(1.3); compass.SetMeasurementMode(Measurement_Continuous); } voidloop() { MagnetometerRaw raw = compass.ReadRawAxis(); MagnetometerScaled scaled = compass.ReadScaledAxis(); float xHeading = atan2(scaled.YAxis, scaled.XAxis); float yHeading = atan2(scaled.ZAxis, scaled.XAxis); float zHeading = atan2(scaled.ZAxis, scaled.YAxis); if(xHeading < 0) xHeading += 2*PI; if(xHeading > 2*PI) xHeading -= 2*PI; if(yHeading < 0) yHeading += 2*PI; if(yHeading > 2*PI) yHeading -= 2*PI; if(zHeading < 0) zHeading += 2*PI; if(zHeading > 2*PI) zHeading -= 2*PI; float xDegrees = xHeading * 180/M_PI; float yDegrees = yHeading * 180/M_PI; float zDegrees = zHeading * 180/M_PI; Serial.print(xDegrees); Serial.print(","); Serial.print(yDegrees); Serial.print(","); Serial.print(zDegrees); Serial.println(";"); delay(100); }
上传时间： 2014-03-20
上传用户：tianyi223
