This is the second half of our Transistor Circuits e-book. It contains a further 100 circuits, with many of them containing one or more Integrated Circuits (ICs).It's amazing what you can do with transistors but when Integrated Circuits came along, the whole field of electronics exploded.
上传时间： 2013-11-08
上传用户：603100257
This example provides a description of how to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow: - BaudRate = 115200 baud - Word Length = 8 Bits - One Stop Bit - No parity - Hardware flow control enabled (RTS and CTS signals) - Receive and transmit enabled - USART Clock disabled - USART CPOL: Clock is active low - USART CPHA: Data is captured on the second edge - USART LastBit: The clock pulse of the last data bit is not output to the SCLK pin
上传时间： 2013-10-31
上传用户：yy_cn
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1-Wire Protocols Each Adapter Has Its Own Unique Serial ID, Allowing Multiple Adapters to be Connected Without COM Port Conflicts Has In-Field Upgradable Capability if Firmware Needs to be Upgraded Enclosure Protects from Shorts and ESD
标签： MAXQUSBJTAGOW 评估板 软件
上传时间： 2013-10-24
上传用户：teddysha
用途：测量地磁方向，测量物体静止时候的方向，测量传感器周围磁力线的方向。注意，测量地磁时候容易受到周围磁场影响，主芯片HMC5883 三轴磁阻传感器特点（抄自网上）： 1，数字量输出：I2C 数字量输出接口，设计使用非常方便。 2，尺寸小: 3x3x0.9mm LCC 封装，适合大规模量产使用。 3，精度高：1－2 度，内置12 位A/D,OFFSET, SET/RESET 电路，不会出现磁饱和现象，不会有累加误差。 4，支持自动校准程序，简化使用步骤，终端产品使用非常方便。 5，内置自测试电路，方便量产测试，无需增加额外昂贵的测试设备。 6，功耗低：供电电压1.8V, 功耗睡眠模式-2.5uA 测量模式-0.6mA 连接方法： 只要连接VCC，GND，SDA，SDL 四条线。 Arduino GND -> HMC5883L GND Arduino 3.3V -> HMC5883L VCC Arduino A4 (SDA) -> HMC5883L SDA Arduino A5 (SCL) -> HMC5883L SCL (注意，接线是A4，A5，不是D4,D5) 源程序： #include <Wire.h> #include <HMC5883L.h> HMC5883Lcompass; voidsetup() { Serial.begin(9600); Wire.begin(); compass = HMC5883L(); compass.SetScale(1.3); compass.SetMeasurementMode(Measurement_Continuous); } voidloop() { MagnetometerRaw raw = compass.ReadRawAxis(); MagnetometerScaled scaled = compass.ReadScaledAxis(); float xHeading = atan2(scaled.YAxis, scaled.XAxis); float yHeading = atan2(scaled.ZAxis, scaled.XAxis); float zHeading = atan2(scaled.ZAxis, scaled.YAxis); if(xHeading < 0) xHeading += 2*PI; if(xHeading > 2*PI) xHeading -= 2*PI; if(yHeading < 0) yHeading += 2*PI; if(yHeading > 2*PI) yHeading -= 2*PI; if(zHeading < 0) zHeading += 2*PI; if(zHeading > 2*PI) zHeading -= 2*PI; float xDegrees = xHeading * 180/M_PI; float yDegrees = yHeading * 180/M_PI; float zDegrees = zHeading * 180/M_PI; Serial.print(xDegrees); Serial.print(","); Serial.print(yDegrees); Serial.print(","); Serial.print(zDegrees); Serial.println(";"); delay(100); }
上传时间： 2013-12-16
上传用户：stella2015
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1-Wire Protocols Each Adapter Has Its Own Unique Serial ID, Allowing Multiple Adapters to be Connected Without COM Port Conflicts Has In-Field Upgradable Capability if Firmware Needs to be Upgraded Enclosure Protects from Shorts and ESD
标签： MAXQUSBJTAGOW 评估板 软件
上传时间： 2013-11-23
上传用户：truth12
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
fpga
上传时间： 2013-11-06
上传用户：拢共湖塘
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
上传时间： 2013-11-23
上传用户：kangqiaoyibie
The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.
上传时间： 2013-11-03
上传用户：ysystc670
The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat of the FPGA package. As the interfaces get fasterand wider, choosing the right package has becomeone of the key considerations for the systemdesigner.
上传时间： 2013-11-07
上传用户：wanghui2438
