The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of these DSPs.
标签： TMS 320 fixed-point processor
上传时间： 2013-12-27
上传用户：宋桃子
FIC8120 方案 Multi-ICE
上传时间： 2016-11-19
上传用户：ANRAN
Spectrum Digital, Inc的 详细的 DM6467开发资料！DaVinciHD_EVM_TechRef_RevD，This is the primary location for all Davinci HD EVM related documentation, notes and errata. This version of the page applies to the lastest shipping version. Here is a complete version history:DaVinci HD Schematics Board schematics
标签： DaVinciHD_EVM_TechRef_RevD Spectrum Digital 6467
上传时间： 2016-11-27
上传用户：huql11633
SIA Digital Communication Standard – Internet Protocol Event Reporting 对做安防的人有用.
标签： Communication Reporting Internet Protocol
上传时间： 2013-12-23
上传用户：asasasas
Digital Integrated Circuits A Design Perspective - Jan M[1].Rabaey，学习大规模集成电路的经典教程
标签： Perspective Integrated Circuits Digital
上传时间： 2014-10-25
上传用户：a3318966
书名为<introduction to digital audio coding and standards>
标签： introduction standards digital coding
上传时间： 2016-11-29
上传用户：66666
TD-SCDMA Digital Front-End - Design Description
标签： Description Front-End TD-SCDMA Digital
上传时间： 2014-01-07
上传用户：啊飒飒大师的
Multi-Agent采购系统的遗传优化研究
标签： Multi-Agent 采购
上传时间： 2014-01-24
上传用户：13160677563
A Top-Down Verilog-A Design on the digital phase-lockedmloop
标签： phase-lockedmloop Verilog-A Top-Down digital
上传时间： 2013-12-02
上传用户：silenthink
A Stochastic Time-to-Digital Converter for Digital Phase-Locked Loops
标签： Time-to-Digital Phase-Locked Stochastic Converter
上传时间： 2014-01-16
上传用户：ANRAN
